[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Santa Clara, CA # Senior DFT Engineer US, CA, Santa Clara Senior individual contributor Operations Listed on NVIDIA’s official careers site. Posted October 17, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-DFT-Engineer_JR2022681) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior DFT Engineer ## Job description NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. ### What you'll be doing As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression. In addition, you will help develop and deploy DFT methodologies for our next generation products. You will have the chance to define, prototype and deploy next generation DFX architectures and methodologies across all our products. This includes high speed test access architectures, the in-system-test architecture, ISO26262 functional safety diagnostic for in-field testing and beyond, silicon debug & bring-up, productization, and silicon life-cycle management among others As a member on our DFX Architecture team, your responsibility will be to craft key DFX architecture and methodologies to meet system level safety diagnostic test quality, in-field test quality, advanced defect screening and diagnosis to enable SLM for automotive, industrial, and robotics safety platforms etc. Collaborate with multi-functional teams like system architecture, chip architecture, ASIC design, verification, CAD, VLSI, SW development, and Operations teams to productize new methodologies Help the team with delivering efficient workflows and tools to help productize these features on industry's leading processors for deep learning, gaming, HPC and supercomputing You will also help mentor junior engineers on test designs and trade-offs including cost and quality. ### What we need to see BSEE (or equivalent experience) with 8+ years, MSEE with 5+ years of experience or PhD with 3+yrs in DFT or related domains - Demonstrated knowledge and expertise in defining scan test plans, BIST including memories and IOs, fault modeling, ATPG and fault simulation - Excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs using vendor tools Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development - Strong programming and scripting skills in Perl, Python or Tcl desired Extraordinary written and oral communication skills with the curiosity to work on rare challenges Our technology has no boundaries! NVIDIA is building the world’s most groundbreaking and state of the art compute platforms for the world to use. It’s because of our work that scientists, researchers and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most demanding computer users in the world - scientists, designers, artists, and gamers. NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until August 21, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Oct 17, 2026 - First seen by OpenNash: Aug 20, 2026 - Last checked: Oct 20, 2026 - Listed for: 61 days - Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-DFT-Engineer_JR2022681) ## More jobs at NVIDIA ### [ASIC Clocks Verification Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/634d881f29a7a2632449/) US, CA, Santa Clara ### [ASIC Verification Engineer](https://jobs.opennash.com/companies/nvidia/jobs/52c13f6335fb98e58de1/) US, CA, Santa Clara ### [ASIC Verification Engineer - New College Grad 2027](https://jobs.opennash.com/companies/nvidia/jobs/9d98fd56c400ae295ad5/) US, CA, Santa Clara ### [ATE Test Development Engineer](https://jobs.opennash.com/companies/nvidia/jobs/bca8e15f7545d3c56e87/) US, CA, Santa Clara ## Similar jobs at other companies ### [DFT Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/28e4aaa038c98a1c41c2/) Qualcomm · San Diego, California, United States of America ### [DFT-Staff Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/97dec7c922f6ec195d6f/) Qualcomm · Austin, Texas, United States of America ### [ASIC Design-for-Test (DFT) Engineer Intern](https://jobs.opennash.com/companies/keysight-technologies/jobs/9108388acb69aab0821f/) Keysight Technologies · Colorado Springs, Colorado ### [DFT Engineer](https://jobs.opennash.com/companies/globalfoundries/jobs/ac0b6cc4aa1ad6fbfec2/) GlobalFoundries · Richardson, Texas, United States of America ### [DFT, Principal Engineer](https://jobs.opennash.com/companies/synopsys/jobs/d2c0511cc96e0d32e4c6/) Synopsys · Austin, Texas OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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