[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · India, Bengaluru # Senior SoC Design Engineer India, Bengaluru Senior individual contributor Design Listed on NVIDIA’s official careers site. Posted October 19, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/India-Bengaluru/Senior-SoC-Design-Engineer_JR2022790) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior SoC Design Engineer ## Job description NVIDIA is seeking a Senior SoC Design Engineer to design the next-generation SoCs. We are looking for special individuals to deliver innovative products. Together, we will build the next generation of life-changing SoCs. If you are a motivated individual who understands how complex SOC and Subsystems are built, has intimate knowledge of client requirements, and understands various development cycles, this is your place to be. ### What you'll be doing Drive SOC execution working with all multi-functional teams to define, track and drive dependencies working closely with the SoC verification, DFT, STA, Low Power and Validation teams. Drive SoC Assembly, SoC level quality checks, Connectivity reviews and signoff, SoC level Lint and CDC, Bug Triaging, Code reviews and ECOs. Participate in silicon architecture, micro-architecture reviews, collaborate with Architecture, SW/FW, Design, Modeling, Verification, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right SoC design. Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection and IP licensing. Identify candidates, hire, and mentor SoC Design engineers, and as a team, identify problems and inefficiencies in the process and propose solutions. ### What We Need To See Bachelor's or Master's degree or equivalent experience in Electronics and Communication Engineering or Electrical Engineering. 3-12 years of hands on SoC Design experience, expertise in Verilog/System-Verilog, Knowledge of AMBA protocols - AXI, AHB, APB, SoC Clocks/RST/Debug architecture and sound understanding of peripherals ( USB, PCIE and SDCC) Strong coding skills in Perl, Python, or other industry-standard scripting languages. Experience in RTL Build flows and Makefiles, Synthesis is a plus. Experience working with SoC level floorplan team is an added advantage. Background in developing tools and infrastructure using Perl or Python. Excellent analytical and problem-solving skills. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-Hybrid ## At a glance - Posted by the employer: Oct 19, 2026 - First seen by OpenNash: Aug 20, 2026 - Last checked: Oct 20, 2026 - Listed for: 61 days - Location: India, Bengaluru[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/India-Bengaluru/Senior-SoC-Design-Engineer_JR2022790) ## More jobs at NVIDIA ### [ASIC Design Engineer - Performance Monitoring](https://jobs.opennash.com/companies/nvidia/jobs/38e6b97e1fec7e042bff/) India, Bengaluru ### [CAD Layout Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/e89ad76c81ba7379572d/) India, Bengaluru ### [Memory Mask Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/0e280a10d2d72e4217eb/) India, Bengaluru ### [Senior ASIC Design Engineer - NOC IP](https://jobs.opennash.com/companies/nvidia/jobs/09d13e4cb4e316564c25/) India, Bengaluru ### [Senior ASIC Design Engineer - XBAR IP](https://jobs.opennash.com/companies/nvidia/jobs/755888e676dc55a85b20/) India, Bengaluru ## Similar jobs at other companies ### [SoC Physical Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/b56e1c36ecb420fcae79/) Qualcomm · Bangalore, India ### [RTL Design (SOC) Engineer-Staff](https://jobs.opennash.com/companies/qualcomm/jobs/2b7e2461882285161fa8/) Qualcomm · Bangalore, India ### [SOC FE Design Engineer（SoCフロントエンド設計エンジニア）](https://jobs.opennash.com/companies/renesas-electronics/jobs/9c5b3683e7525f383697/) Renesas Electronics · Kodaira, Japan ### [Working Student - RTL Design for SoC Fault Tolerance & Error Detection (f/m/div)](https://jobs.opennash.com/companies/infineon-technologies/jobs/ff06c8b5953ff147853a/) Infineon Technologies · Munich ### [Lead Design Engineer, SoC Design](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/80590fef0c7437d90383/) NXP Semiconductors · Pune OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations. OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)