[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/)

NVIDIA · Multiple locations

# Physical Design Power Optimization and Modeling Engineer

Multiple locations Design 

Listed on NVIDIA’s official careers site. Listed as of October 20, 2026. Check that it is still open and apply there.
[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Yokneam/Physical-Design-Power-Optimization-and-Modeling-Engineer_JR2023707)

[OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Physical Design Power Optimization and Modeling Engineer

## Job description

NVIDIA is looking for best-in-class Physical Design Power Engineer to join our outstanding Networking Silicon Power engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput, lowest latency and best Power! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

### What you will be doing

Power Optimization of Physical design, of blocks/top-level/fc under challenging constraints. Optimization involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise fixes. Power estimation and power modeling.

### What we need to see

B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering. 1+ years of experience in physical design and/or BE power optimization aspects. Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). Native ability to leverage modern AI tools to accelerate engineering workflows, productivity, and problem-solving. Knowledge in physical design flows and methodologies (PNR, STA, physical verification) is an advantage.

FE design experience is an advantage. Excellent problem-solving, partnership, and interpersonal skills. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 13, 2026
- Last checked: Oct 20, 2026
- Listed for: 7 days
- Location: Multiple locations[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Yokneam/Physical-Design-Power-Optimization-and-Modeling-Engineer_JR2023707)

## More jobs at NVIDIA

### [ASIC Design Engineer – Clocks IP](https://jobs.opennash.com/companies/nvidia/jobs/9c7f63d0b4ece0c46f2e/)

### [ASIC Design and STA Engineer](https://jobs.opennash.com/companies/nvidia/jobs/55a504616b4142dab9f9/)

### [ASIC Physical Design Engineer, Netlisting - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/12d0ec2853f1556297c8/)

### [Applied Agentic AI Lead, Partner Co-Design](https://jobs.opennash.com/companies/nvidia/jobs/e14889671d03dda7e34a/)

### [Board Design Engineer, NVLINK](https://jobs.opennash.com/companies/nvidia/jobs/316883757a3d5bae28f7/)

## Similar jobs at other companies

### [Android Performance Optimization / Power Performance - Staff Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/ae100d02b9729a4b6d68/)

Qualcomm · Bangalore, India

### [Scientist in Power System Analysis and Optimization Algorithms (f/m/d)](https://jobs.opennash.com/companies/hitachi/jobs/bd0ee7d71531f89fe20f/)

Hitachi · Mannheim, BW, Germany

### [Power Module Multiphysics Modeling & Simulation Expert | Virtual Product Development | Autonomous Design & Synthesis | AI-Augmented Design Optimization](https://jobs.opennash.com/companies/on-semiconductor/jobs/cc2a7c9fbf11141b3ed4/)

ON Semiconductor · Munich, Bayern, Germany

### [Physical Design for PPA Optimization Engineer](https://jobs.opennash.com/companies/intel/jobs/4d6ff62929b536c61ed1/)

Intel · Israel, Haifa

### [GPU Internships - RTL Design, RTL Power Optimisation & Physical Design](https://jobs.opennash.com/companies/apple/jobs/03c0542abefcee0c2f9e/)

Apple · Cambridge, United Kingdom

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)
