[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/)

NVIDIA · Santa Clara, CA

# Lead Hardware Design Validation Engineer - Memory Subsystem

US, CA, Santa Clara Manager or lead Design 

Listed on NVIDIA’s official careers site. Listed as of October 20, 2026. Check that it is still open and apply there.
[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-System-Products-Memory-Solutions-Engineer_JR2016726)

[OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Lead Hardware Design Validation Engineer - Memory Subsystem

## Job description

Widely considered to be one of the technology world’s most desirable employers, NVIDIA is an industry leader with groundbreaking developments in High-Performance Computing, Artificial Intelligence and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery and powers what were once science fiction inventions from artificial intelligence to autonomous cars.

NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. NVIDIA’s System Product Team is looking for curious, collaborative, and motivated hardware engineers to take our GPU memory subsystem from first silicon power-on to production.

### What you will be doing

Hands-on leadership of HBM/GDDR enablement, validation, and failure analysis for NVIDIA’s datacenter and graphics products. Drive review of memory partner’s design limits and test methodology. Integrate learnings into unique characterization and test plans for each memory generation. Apply understanding of controller design, board design, and DRAM design to define and refine characterization, validation, and POR set methodologies.

Work closely with memory partners to successfully enable memory into production. Work cross-functionally with multiple hardware design and software teams. Guide product level decisions for the memory subsystem that span ASIC/VLSI/Board/ATE.

### What we need to see

Masters or higher in Electrical engineering (or equivalent experience). 10+ years of relevant hands-on experience in high-speed DRAM design and test. Broad comprehension of ASIC design, mixed signal design, and power/signal integrity concepts. Strong fundamentals in science, engineering, and data analysis. Very comfortable being hands-on with hardware and software. Working knowledge of Linux, scripting, programming, computer systems, and data analysis methods.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 258,750 USD for Level 4, and 200,000 USD - 322,000 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until July 13, 2026. This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Jul 10, 2026
- Last checked: Oct 20, 2026
- Listed for: 102 days
- Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-System-Products-Memory-Solutions-Engineer_JR2016726)

## More jobs at NVIDIA

### [ASIC Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/43f31ed2cc68359a6eb3/)

US, CA, Santa Clara

### [ASIC Design Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/1f49ca2bc1e479a84171/)

US, CA, Santa Clara

### [ASIC Design Engineer - New College Grad 2027](https://jobs.opennash.com/companies/nvidia/jobs/fc9c26d2c4e94a2e074b/)

US, CA, Santa Clara

### [ASIC Floorplan Design Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/8e358841c56200d722b1/)

US, CA, Santa Clara

## Similar jobs at other companies

### [Server Hardware Validation / Systems Integration Engineer](https://jobs.opennash.com/companies/hitachi/jobs/bc7388caa8cee32fea90/)

Hitachi · Boston, MA, United States

### [Senior Hardware Engineer - Memory & Storage Validation](https://jobs.opennash.com/companies/microsoft/jobs/9c2ed3994a1af99c2585/)

Microsoft · United States, Washington, Redmond, Oregon, Hillsboro, California, Mountain View

### [Senior System and Hardware Validation Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/98b70b35c2f64438e45c/)

Qualcomm · San Diego, California, United States of America, Austin, Texas

### [Hardware Engineer Stf/ Digital Design](https://jobs.opennash.com/companies/lockheed-martin/jobs/f4e1a8002ca8a210de04/)

Lockheed Martin · Owego, NY

### [Senior Electrical Hardware Design Engineer](https://jobs.opennash.com/companies/general-dynamics/jobs/d65304e0b2a329d9aa54/)

General Dynamics · Dedham, MA, US

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)
