[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Santa Clara, CA # Cell Modeling and Verification Engineer - New College Grad 2026 US, CA, Santa Clara Operations Listed on NVIDIA’s official careers site. Listed as of October 20, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Cell-Modelling-and-Verification-Engineer---New-College-Grad-2026_JR2011631) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Cell Modeling and Verification Engineer - New College Grad 2026 ## Job description Our work at NVIDIA is dedicated towards a computing model focused on visual and AI computing. For two decades, NVIDIA has pioneered visual computing, the art and science of computer graphics, with our invention of the GPU. The GPU has also shown to be spectacularly effective at solving some of the most complex problems in computer science. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots and self-driving cars that can perceive and understand the world. We are looking to grow our company and teams with the smartest people in the world and there has never been a more exciting time to join our team! The NVIDIA VLSI team is looking for a Cell Modeling and Verification Engineer with strong experience in hardware design and methodologies to help develop NVIDIA's ground breaking ASIC products and work hands on with new NVIDIA hardware to ensure it meets design, feature, and quality objectives. Our team is at the intersection of circuit design and digital design to help craft the most power-efficient and performance leading SoCs and GPUs to push the state of the art ASIC Verilog modelling. ### What you will be doing Work with sophisticated technologies and develop behavioral model and verification for custom mixed signal design cells that would be used on all the NVIDIA products. Use Verilog, SystemVerilog, Perl, or Python and understanding of PLL and other high-speed interconnects to model, verify, emulate/prototype mixed-signal designs. Collaborate with cross function teams with regards to library build, cell integration, ASIC verification and DFT simulation. Document, implement, and deliver fully verified and high performance RTL to achieve design targets. ### What we need to see Bachelors or Masters in Electrical Engineering or Computer Engineering (or equivalent experience). Hands-on experience with RTL simulation and waveform debug. Strong understanding of Verilog HDL. Scripting experiences and skills using Python or Perl. Knowledge of fundamental digital design and logic design concepts. ### Ways to stand out from the crowd Previous digital design experience is a plus. Previous experience running simulations in Verilog. Shown ability to collaborate with many groups and communicate technical details. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 100,000 USD - 166,750 USD for Level 1, and 116,000 USD - 189,750 USD for Level 2. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until June 6, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 102 days - Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Cell-Modelling-and-Verification-Engineer---New-College-Grad-2026_JR2011631) ## More jobs at NVIDIA ### [ASIC Clocks Verification Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/634d881f29a7a2632449/) US, CA, Santa Clara ### [ASIC Verification Engineer](https://jobs.opennash.com/companies/nvidia/jobs/52c13f6335fb98e58de1/) US, CA, Santa Clara ### [ASIC Verification Engineer - New College Grad 2027](https://jobs.opennash.com/companies/nvidia/jobs/9d98fd56c400ae295ad5/) US, CA, Santa Clara ### [ATE Test Development Engineer](https://jobs.opennash.com/companies/nvidia/jobs/bca8e15f7545d3c56e87/) US, CA, Santa Clara ## Similar jobs at other companies ### [Product Development Engineer- Battery Cell/System Modeling Engineer](https://jobs.opennash.com/companies/ford-motor/jobs/1fc169f5793e59460677/) Ford Motor · Dearborn, MI, United States ### [Standard Cell Layout Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/c951d0c8ab33f5b79db5/) Qualcomm · Tijuana, Baja California, Mexico ### [Modeling and Simulation Engineer](https://jobs.opennash.com/companies/lockheed-martin/jobs/3e166ba5389ddac1bf9e/) Lockheed Martin · Uniondale, NY ### [Device Modeling Engineer, Senior](https://jobs.opennash.com/companies/qualcomm/jobs/81ac01c952278ccf8c5e/) Qualcomm · Tijuana, Baja California, Mexico ### [Systems Engineer Senior - Modeling & Simulation](https://jobs.opennash.com/companies/lockheed-martin/jobs/eba570dab882bc1e0d11/) Lockheed Martin · Sunnyvale, CA OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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