[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Taiwan, Hsinchu # Senior Package Layout Engineer Taiwan, Hsinchu Senior individual contributor Operations Listed on NVIDIA’s official careers site. Listed as of October 20, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Hsinchu/Senior-Package-Layout-Engineer_JR2002674) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior Package Layout Engineer ## Job description NVIDIA have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. NVIDIA IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for NVIDIA products. ### What you'll be doing As part of a Package Layout team, you will collaborate to implement high speed and PDN design for ASIC packages. Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using APD or SiP tools. Optimize package pin out incorporating system level trade-offs of pins assignment. Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations. In close co-operation with the SI/PI/HW design teams and product teams Planning, ensuring stakeholder management and leading projects from start to finish What we need to see: B.Sc. Electrical Engineering or any equivalent experience. - Minimum of 5+ years hand-on in Package or/and PCB Layout; including high speed design signal integrity practice; PDN designing and planning Experience in substrate layout of wire bond and flip chip packages, preferred - Knowledge in substrates or board manufacturing process Significant background with APD or SiP and/or other PCB layout tools English communication skills (written and verbal) are required for this role Ways to stand out from the crowd: Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools - Familiarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting) We are committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 13, 2026 - Last checked: Oct 20, 2026 - Listed for: 7 days - Location: Taiwan, Hsinchu[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Hsinchu/Senior-Package-Layout-Engineer_JR2002674) ## More jobs at NVIDIA ### [IC Test Engineer](https://jobs.opennash.com/companies/nvidia/jobs/f3ee149a3c80b8fc4c12/) Taiwan, Hsinchu ### [Manager, SMTA Engineering](https://jobs.opennash.com/companies/nvidia/jobs/0cfa37d4d2196c9321dc/) Taiwan, Hsinchu ### [Product Development Engineer](https://jobs.opennash.com/companies/nvidia/jobs/a96f0e87c9073b7e70f6/) Taiwan, Hsinchu ### [Product Engineer - Board](https://jobs.opennash.com/companies/nvidia/jobs/f6e3f07228384058f37c/) Taiwan, Hsinchu ## Similar jobs at other companies ### [IC Package Layout Engineer, Staff](https://jobs.opennash.com/companies/qualcomm/jobs/47cb97a66a019a270f33/) Qualcomm · Hsinchu City, Taiwan ### [Staff Engineer Analog Layout](https://jobs.opennash.com/companies/infineon-technologies/jobs/dae39b856c85418d4dfc/) Infineon Technologies · Hanoi ### [Staff Engineer Analog Layout](https://jobs.opennash.com/companies/infineon-technologies/jobs/a6206d71c9dd6693d96d/) Infineon Technologies · Penang ### [Packaging Engineer (Substrate Design and Layout)](https://jobs.opennash.com/companies/sandisk/jobs/0879670410f04691dc62/) Sandisk ### [Packaging Engineer (Substrate Design and Layout, Only open for fresh graduate)](https://jobs.opennash.com/companies/sandisk/jobs/735351022b0a02b8dbda/) Sandisk [Operations jobs](/functions/operations/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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