[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Santa Clara, CA # Senior PCB Library Engineer US, CA, Santa Clara Senior individual contributor Operations Listed on NVIDIA’s official careers site. Posted October 2, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-PCB-Library-Engineer_JR2020744) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior PCB Library Engineer ## Job description NVIDIA is seeking a highly skilled Senior PCB Library Engineer to own the development, validation, and release of PCB library assets supporting the world's most advanced computing platforms. In this role, you will serve as a technical expert for PCB component implementation, footprint architecture, padstack development, and library quality. You will partner closely with layout, mechanical, package, schematic, manufacturing, and operations teams to ensure library data enables successful product execution across NVIDIA's Data Center, AI, Networking, Automotive, and Graphics businesses. You will be responsible for creating and maintaining high-quality library content while driving technical standards, design consistency, manufacturing readiness, and continuous improvement across the PCB design ecosystem. ### What you'll be doing Develop, validate, and release PCB footprints, padstacks, schematic symbols, panel definitions, and mechanical library content using Cadence Allegro and related design tools. Review component package drawings, supplier specifications, and engineering requirements to create robust, manufacturable library data. Act as a technical authority for component implementation strategies, package interpretation, and PCB design best practices. Work directly with PCB Layout, Mechanical Engineering, Component Engineering, Manufacturing, SI/PI, and Operations teams to resolve technical issues and improve design quality. Apply strong DFM, DFA, and DFT principles to all library deliverables. Establish and maintain library standards, development procedures, and quality control methodologies. Support advanced technologies including HDI, fine pitch devices, via-in-pad, high-speed interconnects, advanced package integration, and next-generation PCB manufacturing processes. Participate in root cause investigations related to component implementation, manufacturing issues, and library quality escapes. Drive continuous improvement initiatives, including automation, workflow enhancement, and library scalability. What we need to see BS degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, Manufacturing Engineering, or a related field (or equivalent experience). 6+ years of experience in PCB library development, PCB layout, component engineering, manufacturing engineering, or related fields. Expert-level knowledge of PCB component footprint development and package interpretation. Deep understanding of PCB fabrication and PCB assembly manufacturing processes. Strong proficiency with Cadence Allegro PCB Designer. Strong understanding of DFM, DFA, DFT methodologies, IPC-7351 standards, IPC Class 2/Class 3 requirements, PCB stackups, via structures, padstacks, and manufacturing tolerances. Experience interpreting mechanical drawings, package outlines, GD&T, and component specifications. Ways to stand out from the crowd Experience supporting enterprise-scale PCB libraries for complex computing or networking products. Strong PCB layout, component engineering, or manufacturing engineering background. Experience working directly with PCB fabrication suppliers, assembly vendors, and component manufacturers. Knowledge of advanced PCB technologies including HDI, sequential lamination, mSAP, advanced packaging, and high-speed interconnects. Experience with automation and scripting (Python, SKILL, TCL, SQL) and/or IPC CID/CID+ certification. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 258,750 USD for Level 4, and 200,000 USD - 322,000 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until July 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Oct 2, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 102 days - Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-PCB-Library-Engineer_JR2020744) ## More jobs at NVIDIA ### [ASIC Clocks Verification Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/634d881f29a7a2632449/) US, CA, Santa Clara ### [ASIC Verification Engineer](https://jobs.opennash.com/companies/nvidia/jobs/52c13f6335fb98e58de1/) US, CA, Santa Clara ### [ASIC Verification Engineer - New College Grad 2027](https://jobs.opennash.com/companies/nvidia/jobs/9d98fd56c400ae295ad5/) US, CA, Santa Clara ### [ATE Test Development Engineer](https://jobs.opennash.com/companies/nvidia/jobs/bca8e15f7545d3c56e87/) US, CA, Santa Clara ## Similar jobs at other companies ### [Tech IP Library Characterization Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/8c27252b94fae4bd4dfd/) Qualcomm · Tijuana, Baja California, Mexico ### [PCB Layout Design Engineer](https://jobs.opennash.com/companies/lockheed-martin/jobs/223f969626c59a23169e/) Lockheed Martin · Orlando, FL ### [PCB Design Engineer](https://jobs.opennash.com/companies/general-dynamics/jobs/19c8ca326ab1dcf31bb6/) General Dynamics · Pittsfield, MA, US ### [Senior PCB Electronics Engineer- Archdale, NC](https://jobs.opennash.com/companies/hubbell/jobs/15db6918b178347ee685/) Hubbell · Archdale, NC, US ### [Barista - Starbucks at Fondren Library](https://jobs.opennash.com/companies/aramark/jobs/b49e84152da5bd26144c/) Aramark · Dallas, TX, US OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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