[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Multiple locations # Senior ASIC Verification Engineer Multiple locations Senior individual contributor Operations Listed on NVIDIA’s official careers site. Posted October 6, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-ASIC-Verification-Engineer_JR2009482) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior ASIC Verification Engineer ## Job description The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is committed to deliver high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets design has increased many folds. This requires sophisticated verification to deliver a bug free clocks design to power our product lines ranging from Data Centers, Consumer graphics to Self-driving cars and the growing field of artificial intelligence. Modern clocking verification solutions need to be innovative, ensure quality in covering the complex design specifications and balance the constraints on infrastructure, re-usability, testing speed and multi-platform support. ### What you'll be doing Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization. Tackle Sophisticated problems and develop a scalable solution that works across platform. Hands on industry-standard tools and state of the art verification methodologies. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools. Partnering closely with our clocks architecture and design team to validate our clocks design. Coordinate with internal and external teams across time zones. ### What we need to see BS or MS in EE/ECE or equivalent experience. 5+ years of relevant industry work experience. Good understanding of Logic Design and Architecture. Expertise in industry-standard verification flows like SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc. Exposure on block level and system-level verification. Strong coding skills in System Verilog, scripting languages (Perl/python) and C++. Ability to collaborate and work with multiple groups. Prior experience in implementing Test plans for pre-silicon platforms. Understanding of DFT/IST is optional. ### What to Stand Out From the Crowd - Previous experience automating tasks in the design verification process Hands on experience in object-oriented programming Prior design or verification experience at the IP or block level Experience developing methodologies used by others Demonstrated ability to drive a project to completion We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you are creative, curious, and motivated with real passion for technology, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until August 24, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Oct 6, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 102 days - Location: Multiple locations[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-ASIC-Verification-Engineer_JR2009482) ## More jobs at NVIDIA ### [Senior AI Compiler Engineer, Algorithms and Code-Generation](https://jobs.opennash.com/companies/nvidia/jobs/ce986c4f9d156554a1f5/) ### [Senior Compiler Engineer - AI](https://jobs.opennash.com/companies/nvidia/jobs/9c111dccac77ee8e3f09/) ### [Senior Compiler Engineer, AI Inference Platforms](https://jobs.opennash.com/companies/nvidia/jobs/dd0d3e93bbab336d3478/) ### [Senior Formal Verification Engineer - LPU](https://jobs.opennash.com/companies/nvidia/jobs/7b3e72f12aa2102c497d/) ### [Senior Fortran Compiler Engineer](https://jobs.opennash.com/companies/nvidia/jobs/db8294515616d11a82a9/) ## Similar jobs at other companies ### [ASIC Verification & Validation Engineer](https://jobs.opennash.com/companies/sandisk/jobs/b95085e1cf95126531eb/) Sandisk ### [Experienced ASIC Verification Engineer](https://jobs.opennash.com/companies/sandisk/jobs/2e3bfeb099c126455dc1/) Sandisk ### [ASIC/FPGA Design Verification Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/b9ebab233b8dca4884ac/) Qualcomm · Ottawa, Ontario, Canada ### [ASIC/FPGA Design Verification Engineer, Senior](https://jobs.opennash.com/companies/qualcomm/jobs/f7cc8fb7b0460376d7d6/) Qualcomm · Ottawa, Ontario, Canada ### [Staff ASIC Verification Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/95d9d5cd518d9450ad59/) ON Semiconductor · Bangalore, Karnataka, India OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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