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NVIDIA · Santa Clara, CA

# Principal Datacenter HSIO Engineer

US, CA, Santa Clara Senior individual contributor Data & Analytics 

Listed on NVIDIA’s official careers site. Listed as of October 20, 2026. Check that it is still open and apply there.
[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Principal-Datacenter-HSIO-Engineer_JR2013625)

[OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Principal Datacenter HSIO Engineer

## Job description

NVIDIA is a learning machine that constantly evolves by seeking exciting opportunities that matter to the world, and that only we can solve. We attract the world’s best people, so we can achieve our highest aim: building a company that lets us do our life’s work, at the highest level of our craft. Join our new team building the next generation of datacenter infrastructure that powers the future of AI.

We are seeking highly motivated technical experts to join our new organization leading datacenter product design.

### What you'll be doing
- Drive end-to-end system architecture from silicon to rack level
- Lead cross-domain optimization efforts involving power delivery, thermal design, signal integrity, and mechanical constraints
- Develop innovative features at all levels (silicon/system) to help improve GPU performance
- Collaborate with vendors and suppliers for interconnect (electrical/optical), power delivery, and memory solutions
- Provide expertise and support to validation teams with planning and execution
- Work with customers on an as-needed basis to help deliver products What we need to see: 15+ years of experience in a rigorous technical hardware role interfacing with systems (HW system architecture, PCB design, mixed signal design, hardware validation, system verification, signal integrity, etc)
- Master's degree (or equivalent experience) in Electrical Engineering or related field Deeply inquisitive and able to use core technical competencies to provide direction on system architecture
- Ability to see big picture tradeoffs for product success Motivation and ability to manage concurrent projects and priorities with tight deadlines in a multifaceted environment
- Excellent communication skills required to work well with multi-functional teams (software, firmware, marketing, mixed signal, etc.) Previous experience with L10/L11 Deep understanding of system level (L11) power architecture tradeoffs
- Knowledge and experience with modern optical communications (pluggables, CPO)
- Strong signal/power integrity background with hands on lab experience (Oscilloscope, TDR, VNA)

### Ways to Stand Out from the crowd

Experience with applied ML frameworks, successful applications of AI/ML to hardware problems Understanding of electrical vs mechanical tradeoffs Proficiency with CAD simulation tools Ability to think outside the box! Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 240,000 USD - 379,500 USD. You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until March 15, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 13, 2026
- Last checked: Oct 20, 2026
- Listed for: 7 days
- Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Principal-Datacenter-HSIO-Engineer_JR2013625)

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