[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Santa Clara, CA # Senior Product Development Engineer - Datacenter Boards US, CA, Santa Clara Senior individual contributor Data & Analytics Listed on NVIDIA’s official careers site. Listed as of October 20, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Product-Development-Engineer---Datacenter-Boards_JR2018422) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior Product Development Engineer - Datacenter Boards ## Job description We build the hardware that runs the world's AI — and our Operations NPI team is how we bring it from silicon to data center at scale. At NVIDIA, we're proud to work on GPU platforms like Blackwell and Vera Rubin that push the boundaries of what's possible in compute. We move fast, we care deeply about quality, and we invest in people who want to grow across disciplines — board design, test engineering, yield analytics, and global manufacturing, often within a single program cycle. If you're energized by complex hardware challenges and want to see your work running inside the world's most powerful AI infrastructure, we'd love to talk. ### What you'll be doing Module and board NPI for datacenter and HPC products is the core of this role — from first-article through mass production ramp, with accountability for yield targets, quality gates, and on-time delivery. We work closely across Engineering, Mechanical, Thermal, Program Management, and Operations to surface risks early and keep programs on track. Our team defines and continuously improves manufacturing test plans — balancing coverage, test-time, cost, and yield across board and system levels — and we partner with CM sites worldwide to qualify and scale those solutions. We analyze volume manufacturing data using scripting and analytics tools to surface trends that matter and translate them into decisions quickly. When boards fail, we go deep — root-cause analysis across silicon, PCB, and system layers, with findings turned into concrete DFM and DFT improvements for design teams. We hold ourselves and our suppliers to high engineering and quality standards, and we brief leadership regularly on status, yield trends, and improvement roadmaps. ### What we need to see 5+ years in product engineering, product development, manufacturing, or validation of PCBs, silicon, or complex systems experience. Hands-on depth in two or more of the following: server architectures and datacenter system integration; PCB/board design, SMT, and assembly process engineering; board-level or post-silicon validation and characterization; high-speed interface validation (PCIe, NVLink, Ethernet, PAM4); Power Integrity analysis and thermal characterization; or complex test setup design and automation. History of leading complex GPU or board-level projects to mass production on schedule, with high quality and yield. Ability to diagnose and resolve multi-disciplinary problems spanning silicon, board, firmware, and system layers. Clear understanding of testing strategy economics — how coverage, test-time, and escape rate relate to yield and cost outcomes. Communicates complex technical data clearly to both engineering and business audiences. ### Travel Requirement Willingness to travel up to 15%, both domestically and internationally. Bachelor’s degree in Electrical Engineering or Master's degree in Electrical Engineering, or equivalent experience. ### Ways to stand out from the crowd Python or scripting experience applied to manufacturing analytics, test automation, or data pipelines. Background coordinating cross-functional debug efforts across silicon, board, and systems. Familiarity with HPC and hyperscale datacenter requirements — hardware engineering, power, cooling, reliability, and serviceability. Experience qualifying advanced memory solutions (HBM, LPDDR) or high-speed SerDes interfaces. Knowledge of PCBA manufacturing processes, mechanical tolerances, and system-level assembly constraints. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 258,750 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until June 7, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 102 days - Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Product-Development-Engineer---Datacenter-Boards_JR2018422) ## More jobs at NVIDIA ### [Applied Machine Learning Engineer - AI for VLSI Design](https://jobs.opennash.com/companies/nvidia/jobs/40ebaa71de26485ec746/) US, CA, Santa Clara ### [Applied Machine Learning Engineer, AI for VLSI Design - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/44a9b230fd6f9126814d/) US, CA, Santa Clara ### [Business Intelligence Analyst - Marketing](https://jobs.opennash.com/companies/nvidia/jobs/4145bd733159d5c83e1a/) US, CA, Santa Clara ### [Data Analytics CPU Workload Performance Product Manager](https://jobs.opennash.com/companies/nvidia/jobs/298afc9af2bf692393bd/) US, CA, Santa Clara ### [Data Center Power Test Architect](https://jobs.opennash.com/companies/nvidia/jobs/c7c8f0519aab9958d722/) US, CA, Santa Clara ## Similar jobs at other companies ### [New Product Development Engineer](https://jobs.opennash.com/companies/eaton/jobs/c13e79de275730618a91/) Eaton · Jackson, Mississippi, USA ### [Senior Product Development Engineer](https://jobs.opennash.com/companies/eaton/jobs/16f7ec1f720d4ad244cd/) Eaton · Raleigh, North Carolina, USA ### [Product Development Systems Engineer II](https://jobs.opennash.com/companies/trane-technologies/jobs/539b3c709f5f40ac870d/) Trane Technologies · La Crosse, Wisconsin, United States of America ### [Senior Systems Engineer - Product Development](https://jobs.opennash.com/companies/ge-healthcare-technologies/jobs/421e57f622e873f476ae/) GE HealthCare Technologies · Waukesha, Wisconsin, United States of America ### [Global Datacenter Engineer Sr Lease Program Manager-AI](https://jobs.opennash.com/companies/microsoft/jobs/6e247cd7c4e83930cb46/) Microsoft · United States, Multiple Locations OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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