[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) NVIDIA · Multiple locations # ASIC Design Engineer, High Speed IO Multiple locations Design Listed on NVIDIA’s official careers site. Posted November 3, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/India-Bengaluru/ASIC-Design-Engineer--High-Speed-IO_JR2028797) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / ASIC Design Engineer, High Speed IO ## Job description NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for RTL Design engineers for our High Speed IO IP's deployed in Automotive chips. As one of the primary designers, you will be responsible for UFS/Ethernet/PCIE/USB IP's of next generation chips. One should possess strong digital design and verification fundamentals. ### What you'll be doing As a designer, be responsible for understanding the specific protocol concepts and features, make architectural trade-offs based on feature/performance/power requirements, analyze system implications, come up with the micro-architecture, implement RTL, drive the verification, close timing, and support silicon validation. During the course of a project you would end up driving the following aspects of design for your unit: - Own micro-architecture and RTL development of design modules Micro-architect features to meet performance, power and area requirements - Work with HW architects to define critical features - Partner with verification teams to verify the correctness of implemented features - Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. ### What we need to see You should be BTech/MTech in EE, ECE or similar stream, having a proven track record with 2+ years of experience in crafting complex Units and CPU/micro-controller based Sub-systems - Knowledge of HSIO standards, protocols and architectures of modern SOC's would be a significant plus - Excellent influencing skills resulting in collaboration with cross-cultural, multi geography and matrixed teams Good debugging, analytical and problem solving skills Great interpersonal skills and ability to work as an excellent teammate Working exposure with AI tools like Claude and Cursor would be a plus We have some of the most brilliant and talented people in the world working for us. If you're creative and independent, with a genuine real passion for technology and improving the state of art, we want to hear from you! Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ #LI-Hydrid ## At a glance - Posted by the employer: Nov 3, 2026 - First seen by OpenNash: Nov 3, 2026 - Last checked: Nov 10, 2026 - Listed for: 7 days - Location: Multiple locations[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/India-Bengaluru/ASIC-Design-Engineer--High-Speed-IO_JR2028797) ## Hiring at NVIDIA - Open jobs: 2,784 - New in the last 7 days: After two weekly collections - Tracked since: Jul 10, 2026 [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Weekly hiring report](/reports/hiring/) ## More jobs at NVIDIA ### [ASIC Design and STA Engineer](https://jobs.opennash.com/companies/nvidia/jobs/55a504616b4142dab9f9/) ### [ASIC Physical Design Engineer, Netlisting - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/12d0ec2853f1556297c8/) ### [Applied Agentic AI Lead, Partner Co-Design](https://jobs.opennash.com/companies/nvidia/jobs/e14889671d03dda7e34a/) ### [Board Design Engineer, NVLINK](https://jobs.opennash.com/companies/nvidia/jobs/316883757a3d5bae28f7/) ## Similar jobs at other companies ### [ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years](https://jobs.opennash.com/companies/cisco-systems/jobs/2c32b7f33352ae771e44/) Cisco Systems · Bangalore, India ### [Asic Staff Test Engineer](https://jobs.opennash.com/companies/micron-technology/jobs/822665afc01fd72b69dd/) Micron Technology ### [Staff Engineer, ASIC Gen AI](https://jobs.opennash.com/companies/micron-technology/jobs/820b1fc08609d9db57a9/) Micron Technology ### [Senior Engineer, Physical Design Engineering (ASIC)](https://jobs.opennash.com/companies/analog-devices/jobs/d6b4dc6bbdcb9230a846/) Analog Devices ### [Senior ASIC Digital Engineer (ASIC SOC Validation with PCIe protocol experience) from 5 to 7 years](https://jobs.opennash.com/companies/sandisk/jobs/292a2cc90c89a771700f/) Sandisk [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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