[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Santa Clara, CA # Senior Physical Design Engineer US, CA, Santa Clara Senior individual contributor Design Listed on NVIDIA’s official careers site. Listed as of October 20, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Physical-Design-Engineer_JR2017826) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior Physical Design Engineer ## Job description We are now looking for a motivated Physical Design Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing! More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to tackle, that only we can pursue, and that matter to the world. This is our life's work, to amplify human inventiveness and intelligence. ### What you'll be doing Drive physical design and timing from netlist to gds. Partner with mixed signal teams to integrate Analog IO’s and macros. Work on multi-mode and multi-corner timing closure, RC extraction, Cross talk, IR drop and EM analysis. Work with the Front-end teams to create and update timing constraints. Perform Physical verification DRC, ERC, LVS, Antenna checks and other checks. Debugging timing violations and implementing functional, Timing ECO’s and perform formal verification. ### What we need to see BS (or equivalent experience) in Electrical or Computer Engineering with 6+ years' experience or MS (or equivalent experience) with 3+ years' experience in physical design. Experienced in Synopsys or Cadence place and route, physical design and timing tools. Ability to form methodologies and automate flows. Scan insertion and DFT knowledge is a plus Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until August 8, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 102 days - Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Physical-Design-Engineer_JR2017826) ## More jobs at NVIDIA ### [ASIC Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/43f31ed2cc68359a6eb3/) US, CA, Santa Clara ### [ASIC Design Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/1f49ca2bc1e479a84171/) US, CA, Santa Clara ### [ASIC Design Engineer - New College Grad 2027](https://jobs.opennash.com/companies/nvidia/jobs/fc9c26d2c4e94a2e074b/) US, CA, Santa Clara ### [ASIC Floorplan Design Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/8e358841c56200d722b1/) US, CA, Santa Clara ## Similar jobs at other companies ### [Physical Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/dda9e8d7a67c5354a6eb/) Qualcomm · Tijuana, Baja California, Mexico ### [CPU Physical Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/831567c9a5b68f024d18/) Qualcomm · Austin, Texas, United States of America ### [Physical Design CAD Engineer](https://jobs.opennash.com/companies/microsoft/jobs/c6f51a8f2a250a28e52f/) Microsoft · United States, Oregon, Hillsboro, California, Mountain View, North Carolina, Raleigh ### [Physical Design Engineer II (IC)](https://jobs.opennash.com/companies/arrow-electronics/jobs/ec91eccc72f42a5fcfc2/) Arrow Electronics · San Jose, CA, United States of America ### [Senior Physical Design Engineer](https://jobs.opennash.com/companies/microsoft/jobs/e7e19400d6681015759d/) Microsoft · United States, Oregon, Hillsboro, California, Mountain View, Texas, Austin, North Carolina, Raleigh, Washington, Redmond [Jobs in Santa Clara, CA](/locations/us/ca/santa-clara/)[Jobs in California](/locations/us-ca/)[Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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