[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Santa Clara, CA # Senior Mixed Signal Circuit Design Engineer US, CA, Santa Clara Senior individual contributor Design Listed on NVIDIA’s official careers site. Posted October 13, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Mixed-Signal-Circuit-Design-Engineer_JR2027670) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior Mixed Signal Circuit Design Engineer ## Job description We are now looking for a Senior Mixed Signal Design Engineer to be part of the Mixed Signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. The team is responsible for the development and implementation of high-speed interfaces and analog circuits. Gain hands-on experience taking innovative integrated circuit designs at data rates of 100Gbps and higher from concept through silicon characterization. Come join our dynamic team today! ### What you'll be doing You will be part of the design and implementation of high-speed interface circuits; Have the chance to create projects including high speed transceivers and high frequency PLLs. Become involved in the design, simulation, and verification of mixed-signal circuits; Lead mask designers, provide mentorship for floorplan and layout design. Provide support to the lab characterization of silicon and pursue the challenges of circuit design in deep submicron CMOS. You will take designs through implementation and productizing. Collaborate with multi-functional teams. ### What we need to see MS in Electrical Engineering (or equivalent experience), PhD preferred 4+ years of design experience in CMOS analog / mixed-signal circuit Working knowledge of Cadence custom design tools, circuit simulator, timing analysis tool; Your extensive design experience in Data Converters, Tx, Rx, CDR, PLL for high-speed IO interfaces. Someone who's an exceptional teammate with good interpersonal skills; Validated experience in leading and mentoring designers. In-depth understanding of deep submicron CMOS process and related circuit design issues; Proven experience in silicon bring-up, debugging and use of lab instrumentation is required. Knowledge in system level timing budget, signal integrity, and power integrity is a plus; Experience in Verilog, Matlab, Nanotime is helpful. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until October 16, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Oct 13, 2026 - First seen by OpenNash: Oct 13, 2026 - Last checked: Oct 20, 2026 - Listed for: 7 days - Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Mixed-Signal-Circuit-Design-Engineer_JR2027670) ## More jobs at NVIDIA ### [ASIC Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/43f31ed2cc68359a6eb3/) US, CA, Santa Clara ### [ASIC Design Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/1f49ca2bc1e479a84171/) US, CA, Santa Clara ### [ASIC Design Engineer - New College Grad 2027](https://jobs.opennash.com/companies/nvidia/jobs/fc9c26d2c4e94a2e074b/) US, CA, Santa Clara ### [ASIC Floorplan Design Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/8e358841c56200d722b1/) US, CA, Santa Clara ## Similar jobs at other companies ### [Mixed Signal Circuit Design Coop](https://jobs.opennash.com/companies/nokia/jobs/4e3fd55c2cc7977c1141/) Nokia · United States ### [Senior Staff Engineer, Analog Mixed Signal Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/5bcb6b66b7e1a74b1acf/) Infineon Technologies · Irvine, CA ### [Analog/Mixed Signal ASIC Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/798ef1101649c25b5f1d/) Qualcomm · San Diego, California, United States of America OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations. OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)