[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Nokia jobs](https://jobs.opennash.com/companies/nokia/) · [Search jobs](/search/) Nokia · United States # Sr High Speed Mixed Signal Circuit Design Eng United States On-site Senior individual contributor Design Listed on Nokia’s official careers site. Posted August 24, 2026. Check that it is still open and apply there. [Apply on Nokia’s careers site →](https://fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/39560) [OpenNash Jobs](https://jobs.opennash.com/) / [Nokia](https://jobs.opennash.com/companies/nokia/) / Sr High Speed Mixed Signal Circuit Design Eng ## Job description In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise​ Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.​ The successful candidate shall possess the capability to design and analyze high-speed, high-performance analog/mixed-signal circuits, including data converters, PLLs, and SERDES, in advanced CMOS FinFET technologies. She or he shall bring the design to production. Engaging in high-speed analog circuit design gives you the chance to create the technical differentiation that will allow Infinera to hold market leadership. By building cutting-edge circuitry, we will together revolutionize the era of efficient high-speed transmission. ## Responsibilities Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs; Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary; Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc. Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality; Need to support and comply with the team’s design methodologies and release flows. ## Qualifications ### Mandatory Knowledge/Skills/Abilities Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc. Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies. Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production. Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis; Must have a good understanding of device physics and the impacts of layout effects; Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS; Collaborative with other local or remote team members in a fast-paced professional environment. ### Preferred Knowledge/Skill/Abilities Fluent in verbal and written communications; Independently resolves issues and conquer design challenges; Self-motivated and detail-oriented; Has the knowledge of (optical) communication theories and Matlab coding. ### Education and Experience Requirements: PhD EE or M.S. in E.E. with 3+ years’ experience ## At a glance - Posted by the employer: Aug 24, 2026 - First seen by OpenNash: Oct 13, 2026 - Last checked: Oct 20, 2026 - Listed for: 57 days - Location: United States - Work arrangement: On-site[Apply on Nokia’s careers site →](https://fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/39560) ## More jobs at Nokia ### [ASIC Physical Design Coop](https://jobs.opennash.com/companies/nokia/jobs/696aa68a1841fee71cfb/) United States ### [Director, ASIC Physical Design](https://jobs.opennash.com/companies/nokia/jobs/d2e4327dc6d88456a17b/) United States ### [Hardware Design Engineer](https://jobs.opennash.com/companies/nokia/jobs/599afcf4963f78db82b8/) United States ### [High-Speed Analog / RF Design Engineer](https://jobs.opennash.com/companies/nokia/jobs/9786ce8b8dbbd4a07abf/) United States ### [Mechanical Design Engineer](https://jobs.opennash.com/companies/nokia/jobs/a27ebc64403f12529cd0/) United States ## Similar jobs at other companies ### [High Speed Stamping Tool & Die Maker III](https://jobs.opennash.com/companies/te-connectivity/jobs/ad63ec57379704b73ead/) TE Connectivity · United States ### [Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes](https://jobs.opennash.com/companies/nvidia/jobs/e8bddb102ef8d18cb106/) NVIDIA · US, CA, Santa Clara ### [High Speed Analog/RF/Mixed-Signal Design Engineer](https://jobs.opennash.com/companies/apple/jobs/b13963e8450084a2fc27/) Apple · Austin, United States of America ### [High Speed IO Analog Mixed Signal Design Engineer](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/dba80a8a6a880dfebf5d/) Advanced Micro Devices (AMD) · San Jose, California OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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