[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Nokia jobs](https://jobs.opennash.com/companies/nokia/) · [Search jobs](/search/) Nokia · United States # Senior Analog EDA/CAD ASIC Engineer United States Hybrid Senior individual contributor Operations Listed on Nokia’s official careers site. Posted June 19, 2026. Check that it is still open and apply there. [Apply on Nokia’s careers site →](https://fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/37834) [OpenNash Jobs](https://jobs.opennash.com/) / [Nokia](https://jobs.opennash.com/companies/nokia/) / Senior Analog EDA/CAD ASIC Engineer ## Job description ### High-Speed Analog EDA/CAD Engineer Brief Description: Full-time position. Infinera is seeking an EDA/CAD Engineer to support SiGE and CMOS research & development and chip design in the Optical Modules Group (OMG) located in Sunnyvale, CA. ### Description Infinera is seeking an EDA/CAD Engineer to support and develop SiGe and CMOS design solutions for the high speed analog ASIC design team. The engineer will be hands-on with all phases of tool flow including foundry interface, PDK installation and support, tool evaluation and installation, layout, archive and tapeout. The engineer must be an expert in analog and mixed-signal circuit design flows and tools. Tasks will include significant tool and PDK customization and design team support. The self-motivated engineer must be able to anticipate problems and devise effective solutions. ### Responsibilities Install, customize and support external vendor PDK’s for both SiGe and CMOS processes Install, customize and support Custom IC and RF CAD environment for the design of high-speed (10–40 Gb/s), broad-band, mixed-signal, integrated circuits for fiber-based wireline applications. Lead and contribute to the development of design standards, IC development processes, CAD tools and design flows. Execute and support layout efforts including archive and tapeout processes Minimum Expertise Requirements: Expert in high-speed analog and mixed-signal IC design concepts and must demonstrate superior critical thinking skills, problem solving capabilities and engineering judgment. Fluent with analog EDA front and back end tools Cadence Virtuoso, ADE Strong SKILL programming a must Mentor Calibre (end user support and rule deck writing) Detailed understanding of advanced high-speed analog & mixed-signal layout concepts FlexLM license management Strong UNIX/Linux knowledge Not required but preferred Perforce Ocean scripting and advanced modelling and simulation knowledge Linux OS support ### Minimum Experience Requirements: 5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required IC Technologies: High-speed IC technologies, including CMOS and bipolar. ### IC Design Software Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must. Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must. General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification. ### Work Environment Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly. ### Education Requirements: BS 5+ years MS 4+ years PhD 3+ years ## At a glance - Posted by the employer: Jun 19, 2026 - First seen by OpenNash: Oct 13, 2026 - Last checked: Oct 20, 2026 - Listed for: 123 days - Location: United States - Work arrangement: Hybrid[Apply on Nokia’s careers site →](https://fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/37834) ## More jobs at Nokia ### [AI Engineering Co-op](https://jobs.opennash.com/companies/nokia/jobs/3c1a92d37cd96cd30ef7/) United States ### [Care Engineer](https://jobs.opennash.com/companies/nokia/jobs/2240e06030fc2df77ed5/) United States ### [Customer Engineer](https://jobs.opennash.com/companies/nokia/jobs/f5c67214bd834445dd82/) United States ### [Customer Engineering Co-op](https://jobs.opennash.com/companies/nokia/jobs/cf5fd37e6620dadef918/) United States ### [Customer Operations Manager](https://jobs.opennash.com/companies/nokia/jobs/eaf9359562c3b7558455/) United States ## Similar jobs at other companies ### [EDA/CAD SW Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/12c190149c61c499ea1f/) Qualcomm · San Diego, California, United States of America ### [CAD/EDA Tools Automation Engineer](https://jobs.opennash.com/companies/intel/jobs/c586f45881b91a8d2127/) Intel · US, Oregon, Hillsboro ### [Foundry PDK / Collateral Integration Engineer (CAD/EDA)](https://jobs.opennash.com/companies/micron-technology/jobs/e29a94a485fd3af9bdd2/) Micron Technology · Richardson, TX ### [ASIC Engineer, EDA Infrastructure](https://jobs.opennash.com/companies/meta-platforms/jobs/4be7982a8388da7f4b03/) Meta Platforms · Sunnyvale, CA +2 more [Operations jobs](/functions/operations/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations. OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)