[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Murata Manufacturing · San Diego, CA # Intern, Analog Design, Technology Platforms - Spring 2026 San Diego, CA, US Early career Design Listed on Murata Manufacturing’s official careers site. Listed as of November 9, 2026. Check that it is still open and apply there. [Apply on Murata Manufacturing’s careers site →](https://jobs.murata.com/pSemi/job/San-Diego-Intern%2C-Analog-Design%2C-Technology-Platforms-Spring-2026-CA-92101/1446858300/) [OpenNash Jobs](https://jobs.opennash.com/) / [Murata Manufacturing](https://jobs.opennash.com/companies/murata-manufacturing/) / Intern, Analog Design, Technology Platforms - Spring 2026 ## Job description pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better. ### Job Summary The Analog Design Intern will assist engineers in designing and developing Technology Platforms’ analog circuits which form a critical part of pSemi’s RFIC products for cellular and connectivity applications. The analog circuits may include but are not limited to charge pumps, bandgap references, low drop-out regulators, logic translators, RF gate drivers, power-on-reset, DFT circuit blocks, etc. Additionally, the candidate will support development of veriloga models for the various analog circuit blocks as well as help document design information for circuit blocks. The candidate may need to interface with Digital design, Layout, Process technology and Modeling teams as necessitated by the scope of their assigned project. ### Roles & Responsibilities Analog/Mixed-Signal Block Design Work independently and with our engineers on simulation and layout of circuit blocks. ### IP Block Characterization Work with Characterization engineer to analyze data from circuit block level testing and create test reports. ### Product Support Build Verilog/Verilog-a models for analog circuit blocks to enable efficient simulations at chip level. Interface with Analog and RFIC design teams as needed to fine tune the models Documentation: Document any design work to educate others on IP block usage. ### Minimum Qualifications Knowledge of analog integrated circuit design Software tools: Cadence, Excel Strength in documentation clarity and completeness Able to work effectively within the group and cross-functionally with other teams Strong sense of urgency to meet task requirements on schedule ### Preferred Qualifications Familiarity with RF IC and Systems topics Familiarity with SOI process ### Education & Experience Requirements BSEE or similar Enrolled in a MS or PhD EE program with RF/Mixed-Signal/Analog circuit focus USD 32.20 – 58.32 Thank you for your interest in our temporary position. Please be advised that the selected candidate will be employed and receive all wages directly from a third-party staffing agency selected by pSemi. pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics. ### Note The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. ### Patents [http://patents.psemi.com](http://patents.psemi.com) ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Nov 9, 2026 - Last checked: Nov 9, 2026 - Listed for: Under a day - Location: San Diego, CA, US[Apply on Murata Manufacturing’s careers site →](https://jobs.murata.com/pSemi/job/San-Diego-Intern%2C-Analog-Design%2C-Technology-Platforms-Spring-2026-CA-92101/1446858300/) ## Hiring at Murata Manufacturing - Open jobs: 54 - New in the last 7 days: After two weekly collections - Tracked since: Oct 12, 2026 [All Murata Manufacturing jobs](https://jobs.opennash.com/companies/murata-manufacturing/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Murata Manufacturing ### [Intern, Digital Design - Fall 2026](https://jobs.opennash.com/companies/murata-manufacturing/jobs/58b097fac80409a78328/) ### [Intern, RFIC Design - Fall 2026](https://jobs.opennash.com/companies/murata-manufacturing/jobs/77ff81f1293ff4838bbf/) ### [Senior Mixed-Signal PMIC Design Engineer](https://jobs.opennash.com/companies/murata-manufacturing/jobs/395798abe75c0e9084b4/) ### [Senior Staff Engineer, RF Power Amplifier Design (Remote - Cedar Rapids, Iowa)](https://jobs.opennash.com/companies/murata-manufacturing/jobs/b84935dfdf53c7ce74cb/) ### [Senior Staff Engineer, RFIC Design and AI Platforms](https://jobs.opennash.com/companies/murata-manufacturing/jobs/0706ad1c3ef504344098/) ## Similar jobs at other companies ### [Internship - IC Analog Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/284df41441fde90e3239/) Infineon Technologies · Andover, MA ### [HyperLynx Analog Simulation Engineer, Staff - Orlando, FL](https://jobs.opennash.com/companies/lockheed-martin/jobs/ddc0c4f35a8df0391a00/) Lockheed Martin · Orlando, FL ### [Analog Design Discipline Manager](https://jobs.opennash.com/companies/bae-systems/jobs/7339aae97c6b4811cf63/) BAE Systems · Endicott, New York, United States ### [Principal SoC HW Analog/Functional Validation Engineer](https://jobs.opennash.com/companies/microsoft/jobs/6edbbe64b7dd9b4c279f/) Microsoft · United States, Oregon, Hillsboro ### [Senior SoC HW Analog/Functional Validation Engineer](https://jobs.opennash.com/companies/microsoft/jobs/1d2324e0a1a3d72275e2/) Microsoft · United States, Oregon, Hillsboro [Jobs in San Diego, CA](/locations/us/ca/san-diego/)[Jobs in California](/locations/us-ca/)[Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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