[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Microsoft jobs](https://jobs.opennash.com/companies/microsoft/) · [Search jobs](/search/) Microsoft # Design Verification Engineer - DDR Memory Subsystem United States, North Carolina, Raleigh, Texas, Austin, Oregon, Hillsboro, California, Mountain View Design Listed on Microsoft’s official careers site. Posted September 30, 2026. Check that it is still open and apply there. [Apply on Microsoft’s careers site →](https://apply.careers.microsoft.com/careers/job/1970393556962906) [OpenNash Jobs](https://jobs.opennash.com/) / [Microsoft](https://jobs.opennash.com/companies/microsoft/) / Design Verification Engineer - DDR Memory Subsystem ## Job description The candidate for this position will be expected and able to complete the following responsibilities: - Own verification of features that are part of Memory Controller IP or Subsystem - Learn about the design and interact with partner teams to define verification strategies and test plans Develop UVM-based and/or Formal verification environments, and run and debug simulations to drive quality - Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals Innovate to improve verification efficiency through methodologies or tools - Apply industry leading generative AI solutions to verification work - Coach and mentor others in your areas of expertise - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. Demonstrated understanding of designs that utilize Coherent Hub Interface (CHI), Advanced Microcontroller Bus Architecture (AMBA) protocols, and JEDEC specification Demonstrated understanding of one or more of the following: memory controller, fabric interconnects, coherency, security, interrupts, PCIe, CXL, and/or protocol bridges Understanding of IP verification from definition to silicon, including writing IP/block or subsystem level test plans, developing tests, debugging failures and coverage signoff Experience creating, maintaining, or integrating test benches, checkers and stimulus using Universal Verification Methodology (UVM), System Verilog Test Bench (SVTB), formal test bench, and optionally Python based post-processing checking Aptitude for writing scripts/software with industry standard languages like Python Experience applying generative AI to day-to-day tasks ## At a glance - Posted by the employer: Sep 30, 2026 - First seen by OpenNash: Aug 21, 2026 - Last checked: Oct 18, 2026 - Listed for: 58 days - Location: United States, North Carolina, Raleigh, Texas, Austin, Oregon, Hillsboro, California, Mountain View[Apply on Microsoft’s careers site →](https://apply.careers.microsoft.com/careers/job/1970393556962906) ## More jobs at Microsoft ### [Principal Design Verification Engineer - Formal](https://jobs.opennash.com/companies/microsoft/jobs/63c5570160bfdee65271/) United States, North Carolina, Raleigh, Texas, Austin, Oregon, Hillsboro, California, Mountain View ### [Associate Creative Director, Art & Film](https://jobs.opennash.com/companies/microsoft/jobs/33d9c9ae5297dd195f2e/) United States, Washington, Redmond, California, Mountain View ### [Creative Director, Art & Film](https://jobs.opennash.com/companies/microsoft/jobs/24d2e1b5e41ee5c14772/) United States, California, Mountain View, Washington, Seattle ### [Creative Director, Copy - Windows, Surface & Services](https://jobs.opennash.com/companies/microsoft/jobs/0b6be9f3cf6548eea132/) United States, Washington, Redmond, California, Mountain View ### [Creative Director, Design](https://jobs.opennash.com/companies/microsoft/jobs/ac15d74d54b21dd4881a/) United States, California, Mountain View, Washington, Redmond ## Similar jobs at other companies ### [SOC Design Verification Engineer– Pre-Si/Post-Si Verification](https://jobs.opennash.com/companies/qualcomm/jobs/52cd325798071ca28842/) Qualcomm · Tijuana, Baja California, Mexico ### [Mechanical Engineer Design Verification Checker](https://jobs.opennash.com/companies/lockheed-martin/jobs/4e7ba518aa7393e46d7a/) Lockheed Martin · Englewood, CO, Littleton ### [Senior Design Verification Engineer - FPGA](https://jobs.opennash.com/companies/bae-systems/jobs/2d624621f44b30e90e78/) BAE Systems · Nashua, New Hampshire, United States ### [Design Verification Engineer | PI](https://jobs.opennash.com/companies/texas-instruments/jobs/87ceda573f630e9d298b/) Texas Instruments · Dallas, TX, United States [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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