[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All Micron Technology jobs](https://jobs.opennash.com/companies/micron-technology/) · [Search jobs](/search/)

Micron Technology · Boise, ID - Main Site

# Layout/Mask Design Engineer

Boise, ID - Main Site Full-time Design 

Listed on Micron Technology’s official careers site. Posted September 30, 2026. Check that it is still open and apply there.
[Apply on Micron Technology’s careers site →](https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Layout-Mask-Design-Engineer_JR113593)

[OpenNash Jobs](https://jobs.opennash.com/) / [Micron Technology](https://jobs.opennash.com/companies/micron-technology/) / Layout/Mask Design Engineer

## Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design and implement physical layouts for advanced digital, analog, and mixed-signal circuits used in the development of memory products.

Responsible for translating schematics into high quality, manufacturable layouts that meet process rules, performance targets, and schedule commitments, while collaborating closely with cross functional engineering teams. Create physical layouts of transistors, resistors, capacitors, and interconnect structures for digital, analog, and mixed-signal circuits. Perform block-level floor planning, including layout area estimation and optimization.

Develop IC top-level floorplans and provide accurate total die area estimates. Execute routing, power bus design, and creation of robust PDN (Power Domain Network) solutions to ensure optimal electrical performance, reliability, and scalability. Ensure layouts comply with foundry process design rules and verify layout-versus-schematic (LVS) and design rule checks (DRC). Apply recommended layout, verification techniques, tools, and design flows to deliver high-quality designs on schedule.

Work closely with analog/mixed-signal and digital design engineers to ensure proper layout implementation, including critical matching and symmetry requirements. Collaborate with Design Engineering, Product Engineering, Process Integration, Probe, and Assembly teams to proactively optimize designs for manufacturability, cost, quality, reliability, and time-to-market. Create and maintain layout-related documentation and actively participate in layout and design reviews.

Support continuous improvement of layout methodologies, flows, and best practices to enhance overall product performance and customer satisfaction. Employer will accept a Bachelor’s degree in Electrical Engineering, Computer Engineering, Material Engineering, or related field.

### Position requires
- Device physics;
- Material characteristics affecting chip design performance;
- Electron microscopy (SEM); and
- Thermodynamics impacting leakage. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.

We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here.

To learn more about Micron, please visit micron.com/careers For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

### AI alert

Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

### Fraud alert

Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

## At a glance
- Posted by the employer: Sep 30, 2026
- First seen by OpenNash: Oct 11, 2026
- Last checked: Oct 18, 2026
- Listed for: 18 days
- Location: Boise, ID - Main Site
- Employment type: Full-time[Apply on Micron Technology’s careers site →](https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Layout-Mask-Design-Engineer_JR113593)

## More jobs at Micron Technology

### [DRAM Design Engineer](https://jobs.opennash.com/companies/micron-technology/jobs/c3cb5e2d534006688853/)

Boise, ID - Main Site

### [DRAM Memory Design Engineer - Principal | MTS | SMTS](https://jobs.opennash.com/companies/micron-technology/jobs/d8054929902166dd77c6/)

Boise, ID - Main Site

### [Design Engineer - DRAM Technology and Products](https://jobs.opennash.com/companies/micron-technology/jobs/cc5366f5e91cc5247843/)

Boise, ID - Main Site

### [Design Engineer, DEG Design Method](https://jobs.opennash.com/companies/micron-technology/jobs/4cfcbdc846f9a15e498b/)

Boise, ID - Main Site

### [Design Validation Product Engineer, DEG Technology](https://jobs.opennash.com/companies/micron-technology/jobs/ce418cb1085c07482831/)

Boise, ID - Main Site

## Similar jobs at other companies

### [Mask Layout Designer](https://jobs.opennash.com/companies/qualcomm/jobs/382a8c6e51bc76d22364/)

Qualcomm · Tijuana, Baja California, Mexico

### [Memory Mask Layout Designer](https://jobs.opennash.com/companies/qualcomm/jobs/08212c6623250088c429/)

Qualcomm · Tijuana, Baja California, Mexico

### [PCB Layout Design Engineer](https://jobs.opennash.com/companies/lockheed-martin/jobs/223f969626c59a23169e/)

Lockheed Martin · Orlando, FL

### [Microwave Design and Layout Engineer](https://jobs.opennash.com/companies/microsoft/jobs/df35e663dde63739f396/)

Microsoft · United States, Washington, Redmond

### [Staff Mask Design Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/238eaa7d87c60c86c3f9/)

Renesas Electronics · Chandler, AZ, United States

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)
