[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Meta Platforms jobs](https://jobs.opennash.com/companies/meta-platforms/) · [Search jobs](/search/) Meta Platforms · Sunnyvale, CA # Technical Lead Engineer — Network Validation & Characterization Sunnyvale, CA Manager or lead Operations Listed on Meta Platforms’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1559003698884457/) [OpenNash Jobs](https://jobs.opennash.com/) / [Meta Platforms](https://jobs.opennash.com/companies/meta-platforms/) / Technical Lead Engineer — Network Validation & Characterization ## Job description Meta's Infrastructure team delivers scalable and reliable custom ASIC solutions to meet Meta's data center needs. Ramping to production and solving data center scaling and deployment challenges requires a systems-based approach to silicon bring-up and validation. ### The team works on productization early architecture and design inputs, pre-silicon validation on emulation platforms, first-silicon bring-up, and post-silicon characterization across process, voltage, and temperature corners. We write tests, build bare-metal environments and reusable frameworks that scale from pre-silicon platforms to large fleets of ASICs in the lab, and we build and maintain extensive lab automation to do it at volume and velocity. ## Responsibilities - Own the end-to-end validation and characterization strategy for Meta custom silicon programs in your domain, from pre-silicon emulation through post-silicon bring-up and PVT characterization - Define the test plan: measurement and benchmarking methodology, instrumentation, functional and performance coverage, corner coverage across process/voltage/temperature, and pass/fail criteria - Establish and document best practices for measurement rigor, accuracy, and correlation across bench, emulation, and ATE/production data - Drive validation of domain feature sets (power or networking) on emulation platforms pre-silicon and on real silicon post-silicon - Review schematics, power delivery networks, high-speed interface designs, and board/platform configurations with hardware and design teams; provide early design and debuggability inputs - Write and review automation and analysis code that scales characterization from a single bench to many units in the lab - Lead debug of complex cross-stack issues — silicon, firmware, driver, board, thermal, and fabric/switch layers — and drive root cause to closure with design, software, hardware, ODM, and vendor partners - Provide technical guidance and planning for a team of validation engineers; mentor engineers and improve standards for data quality and rigor - Partner with manufacturing, production, and data center teams to transfer characterization learnings into production screens and fleet health monitoring ## Qualifications - Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience - 12+ years of relevant industry experience - Demonstrated hands-on validation and characterization experience on complex ASICs, SoCs, NICs, or high-speed interfaces - Proven experience with PVT (Process / Voltage / Temperature) characterization - Ability to read and reason about schematics and either power delivery networks or high-speed interface implementations - Proficiency in Python for test development, lab automation, and/or data analysis Hands-on lab experience with domain-relevant instrumentation Experience taking a custom NIC or networking ASIC from first silicon through high-volume production Experience working directly with ODMs and silicon/IP vendors Hands-on lab experience with domain-relevant instrumentation for Networking - traffic generators, protocol analyzers, high-speed scopes/BERTs, optics and cabling, switches; plus RDMA (RoCE and/or InfiniBand) at the protocol and debug level, Ethernet performance tooling (iperf, netperf, packet capture and analysis), and both front-end and back-end NICs and their differing traffic and scaling models Experience with Linux networking internals, kernel/userspace drivers, and DPDK or verbs-level programming Advanced degree (MS or PhD) in Electrical Engineering, Computer Engineering, or a related field - Familiarity with SerDes tuning, link margining, FEC, and errata characterization Experience building large-scale lab automation frameworks and characterization data pipelines Experience with AI/HPC back-end fabrics and collective communication traffic patterns ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 7 days - Location: Sunnyvale, CA[Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1559003698884457/) ## More jobs at Meta Platforms ### [ASIC Implementation Engineer, Static Verification](https://jobs.opennash.com/companies/meta-platforms/jobs/46a040a0490f25af7852/) Sunnyvale, CA ### [ASIC Validation Engineer, Network Validation & Characterization](https://jobs.opennash.com/companies/meta-platforms/jobs/6f84a078ca80d8b450aa/) Sunnyvale, CA ### [ASIC Validation Engineer, Power Validation & Characterization](https://jobs.opennash.com/companies/meta-platforms/jobs/5d9ce53662d093a0f5eb/) Sunnyvale, CA ### [Audio Electrical Engineer](https://jobs.opennash.com/companies/meta-platforms/jobs/e6f5299cb79393a83514/) Sunnyvale, CA ### [CAD and Integration Engineer, Silicon](https://jobs.opennash.com/companies/meta-platforms/jobs/30ceb2a5b1665f8ae267/) Sunnyvale, CA ## Similar jobs at other companies ### [Sr. Network Engineer / Secret / Onsite: Sunnyvale, CA](https://jobs.opennash.com/companies/lockheed-martin/jobs/97be3073c22b96ddd4e2/) Lockheed Martin · Sunnyvale, CA ### [System Verification & Validation Technical Lead](https://jobs.opennash.com/companies/bae-systems/jobs/539279b9291148244ad1/) BAE Systems · Rockville, Maryland, United States ### [Post-Silicon Validation Technical Program Manager](https://jobs.opennash.com/companies/qualcomm/jobs/ef992789f9511bb0c4bb/) Qualcomm · Santa Clara, California, United States of America ### [Validation Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/7980aacaf472ea146fcc/) Qualcomm · Tijuana, Baja California, Mexico ### [Cybersecurity Validation Engineer](https://jobs.opennash.com/companies/lockheed-martin/jobs/cd57051c4db1de361f67/) Lockheed Martin · Moorestown, NJ OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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