[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Meta Platforms · Sunnyvale, CA # ASIC EDA Infrastructure Engineer Intern Sunnyvale, California, US Internship or early career Early career IT & Infrastructure Listed on Meta Platforms’s official careers site. Posted November 4, 2026. Check that it is still open and apply there. [Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1883872846321140/) [OpenNash Jobs](https://jobs.opennash.com/) / [Meta Platforms](https://jobs.opennash.com/companies/meta-platforms/) / ASIC EDA Infrastructure Engineer Intern ## Job description Meta is hiring ASIC EDA Infrastructure Engineer Interns within our Infrastructure ASIC organization. Our team builds the EDA flows, automation, and infrastructure behind efficient System on Chip (SoC) and IP designs for data center applications. As an intern, you'll work alongside experienced engineers on a scoped project that contributes directly to how our ASIC design teams build silicon — with mentorship, onboarding support, and regular feedback throughout your internship. This is a 12 week internship ## Responsibilities - Contribute to the development and testing of front-end or physical design implementation flows - Help build or improve internal automation tools that increase productivity across ASIC design cycles — for example, RTL generation, memory selection automation, register generation, or filelist generation - Write and maintain scripts that support day-to-day design flow tasks - Help document EDA flows, tool behavior, and evaluation findings for the team Partner with internal infrastructure teams on compute grid, storage, and job scheduling efficiency - Support efforts to adapt Meta infrastructure to ASIC design needs, including source control, continuous integration, data management, and reporting - Present your project results and recommendations to the team at the end of the internship ## Qualifications Currently enrolled in a B.S. degree program in Computer Engineering, Computer Science, Electrical Engineering, or a related field Coursework or project exposure to digital design or ASIC design fundamentals Exposure to RTL design using SystemVerilog, Verilog, or another HDL Programming or scripting experience in Python, exposure to Tcl or shell scripting Interest in developer tooling, automation, build systems, or compute infrastructure - Ability to communicate technical work clearly and collaborate across teams - Must obtain work authorization in country of employment at the time of hire, and maintain ongoing work authorization during employment Intent to return to full-time degree program after completion of the internship Hands-on exposure to industry EDA tools through coursework, a lab/research project, a tapeout or design competition, or a prior internship Experience building automation, scripts, or developer tooling in a team or open-source setting - Familiarity with version control (Git/Mercurial) and continuous integration concepts Exposure to Linux environments, job scheduling, or distributed compute - Demonstrated focus on user experience and customer-oriented solutions ## At a glance - Posted by the employer: Nov 4, 2026 - First seen by OpenNash: Nov 8, 2026 - Last checked: Nov 8, 2026 - Listed for: 4 days - Location: Sunnyvale, California, US - Employment type: Internship or early career[Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1883872846321140/) ## Hiring at Meta Platforms - Open jobs: 1,340 - New in the last 7 days: After two weekly collections - Tracked since: Jul 11, 2026 [All Meta Platforms jobs](https://jobs.opennash.com/companies/meta-platforms/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Meta Platforms ### [ASIC Engineering Intern, Formal Verification](https://jobs.opennash.com/companies/meta-platforms/jobs/3a3de775b0e4b66f2f27/) Sunnyvale, California, US ### [Budget & Finance Ops Specialist, PDO](https://jobs.opennash.com/companies/meta-platforms/jobs/1daa5da6baefd89967f9/) Sunnyvale, California, US ### [ASIC Engineer, Infrastructure Silicon Validation](https://jobs.opennash.com/companies/meta-platforms/jobs/3f68fce22539c0b8760a/) Sunnyvale, CA ### [Business Operations, Infrastructure](https://jobs.opennash.com/companies/meta-platforms/jobs/82b05972cb286af6f8dd/) Menlo Park, CA +2 more ### [Commercial Sourcing Manager, Power and Cooling Infrastructure Equipment](https://jobs.opennash.com/companies/meta-platforms/jobs/9ecf4c7d6306bb2e6807/) Bellevue, WA +2 more ## Similar jobs at other companies ### [Senior Analog EDA/CAD ASIC Engineer](https://jobs.opennash.com/companies/nokia/jobs/01c54540bc22fbe4e7dd/) Nokia · United States ### [EDA/CAD SW Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/12c190149c61c499ea1f/) Qualcomm · San Diego, California, United States of America ### [Hardware Developer - Z, EDA](https://jobs.opennash.com/companies/ibm/jobs/aec036c9a4aeb322abee/) IBM · Austin, TX ### [EDA Customer Success Application Engineer](https://jobs.opennash.com/companies/keysight-technologies/jobs/1b5da8dff90260b60ccb/) Keysight Technologies · Denver, Colorado OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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