[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Meta Platforms jobs](https://jobs.opennash.com/companies/meta-platforms/) · [Search jobs](/search/) Meta Platforms · Menlo Park, CA # Hardware Engineer, PCB Layout Menlo Park, CA Operations Listed on Meta Platforms’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1826062781882324/) [OpenNash Jobs](https://jobs.opennash.com/) / [Meta Platforms](https://jobs.opennash.com/companies/meta-platforms/) / Hardware Engineer, PCB Layout ## Job description Meta is seeking a Staff PCB Layout Engineer to drive the design and delivery of complex printed circuit boards for large-scale infrastructure hardware. In this role, you will define layout architecture and establish engineering standards for high-speed digital, power delivery, and signal integrity-critical designs that power Meta's data center and infrastructure platforms. You will partner with electrical engineers, mechanical engineers, and manufacturing teams to shape board-level design strategy from concept through mass production, ensuring reliability and performance at scale. ## Responsibilities - Define PCB layout architecture and floorplanning strategies for complex, high-layer-count boards used in infrastructure and data center hardware - Establish and own PCB design rules, constraints, and layout guidelines for high-speed interfaces including PCIe, DDR, Ethernet, and SerDes - Lead signal integrity and power integrity analysis in collaboration with electrical engineering teams, driving layout decisions based on simulation results - Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure yield, reliability, and cost targets are met - Define and maintain organization-wide PCB layout standards, templates, and best practices adopted across infrastructure hardware programs - Collaborate with mechanical engineers to resolve board-level packaging constraints, thermal management requirements, and enclosure integration challenges - Provide technical guidance to other layout engineers across multiple concurrent infrastructure hardware programs - Partner with supply chain and component engineering teams to evaluate and qualify alternative components and footprints - Lead post-layout verification activities including design rule checks, electrical rule checks, and pre-production board bring-up support - Evaluate and introduce new EDA tooling, layout methodologies, and fabrication technologies to improve design quality and cycle time ## Qualifications 8+ years of experience in PCB layout design for high-speed digital systems, including boards with DDR, PCIe, or high-speed SerDes interfaces 8+ years of experience with industry-standard EDA layout tools such as Cadence Allegro, Mentor Xpedition, or equivalent Experience defining PCB stack-up configurations, impedance control strategies, and design rule constraints for high-layer-count boards Experience collaborating with signal integrity and power integrity teams to translate simulation results into layout implementation decisions Experience leading PCB layout efforts across the full product development lifecycle from schematic capture through manufacturing release Experience designing PCBs for data center infrastructure hardware including server, storage, or networking platforms Experience with high-speed (100Gbps+) signal interfaces Experience establishing layout centers of excellence or defining team-wide PCB design standards across multiple concurrent programs Experience with complex designs using custom ASICs ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 7 days - Location: Menlo Park, CA[Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1826062781882324/) ## More jobs at Meta Platforms ### [AI/HPC Network Performance Engineer](https://jobs.opennash.com/companies/meta-platforms/jobs/5e3230b62298cd91c095/) Menlo Park, CA ### [Business Support Engineer](https://jobs.opennash.com/companies/meta-platforms/jobs/518ca3f1019c67a3d371/) Menlo Park, CA ### [Compensation Business Partner](https://jobs.opennash.com/companies/meta-platforms/jobs/78620540a3bf014423f2/) Menlo Park, CA ### [Corporate FP&A Manager](https://jobs.opennash.com/companies/meta-platforms/jobs/5ebb10f26065b2d3b405/) Menlo Park, CA ### [Facilities Projects Lead, North America](https://jobs.opennash.com/companies/meta-platforms/jobs/310ef9a594cbb41677cf/) Menlo Park, CA ## Similar jobs at other companies ### [PCB Layout Design Engineer](https://jobs.opennash.com/companies/lockheed-martin/jobs/223f969626c59a23169e/) Lockheed Martin · Orlando, FL ### [Staff Engineer, Hardware Design (PCB Layout)](https://jobs.opennash.com/companies/celestica/jobs/249201ab167b5ea0fe41/) Celestica · Austin, TX, US ### [Principal Chipset Project Engineer – Hardware PCB/Platform Systems for Personal Compute (PC)](https://jobs.opennash.com/companies/qualcomm/jobs/8496750fa2d531d5b368/) Qualcomm · San Diego, California, United States of America ### [PCB/CAD Layout Designer](https://jobs.opennash.com/companies/macom-technology-solutions-holdings/jobs/bb897db09b9c3c2227cf/) MACOM Technology Solutions Holdings · Morrisville, NC ### [Hardware Design & PCB Layout Engineer - Advanced Power Electronics](https://jobs.opennash.com/companies/general-motors/jobs/76c4576116c6587c8854/) General Motors · Warren, Michigan, United States of America OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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