[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Meta Platforms · Sunnyvale, CA # ASIC Verification Engineer, Networking Sunnyvale, California, US Full-time Operations Listed on Meta Platforms’s official careers site. Posted October 27, 2026. Check that it is still open and apply there. [Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1987641745525671/) [OpenNash Jobs](https://jobs.opennash.com/) / [Meta Platforms](https://jobs.opennash.com/companies/meta-platforms/) / ASIC Verification Engineer, Networking ## Job description Meta is hiring an ASIC Design Verification, Networking Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of a team working with experienced engineers across the industry, focused on developing ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test planning, UVM-based testbench development to verification closure. Along with traditional simulation, use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success. ## Responsibilities - Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification - Develop functional tests based on the verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve functional failures in the design, partnering with the Design team Collaborate with cross-functional teams like Design, Model, Emulation, and Silicon validation teams towards ensuring design quality meets defined verification and coverage goals - Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools, and technologies from the industry ## Qualifications - Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience - Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience - 8+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies and/or C/C++ based verification Experience in one or more of the following areas, along with functional verification - Ethernet, 400G MAC, NIC, RDMA, PSP, RoCE (RDMA over Converged Ethernet), congestion control, etc Experience in architecting and implementing design verification infrastructure, and in executing the full verification cycle - Proficiency in scripting languages such as Python, Perl, or TCL to build tools and workflows for verification environments Experience in debugging and resolving complex verification challenges in IP or SoC designs Experience collaborating with cross-functional teams such as design, emulation, and silicon validation to drive verification milestones Experience with IP or integration verification of high-speed interfaces like Ethernet, PCIe, DDR, HBM Experience working across and building relationships with cross-functional design, model, and emulation teams Experience with the verification of ARM/RISC-V based sub-systems or SoCs Experience with the development of fully automated flows and scripts for data exploration, analysis, and performance verification ## At a glance - Posted by the employer: Oct 27, 2026 - First seen by OpenNash: Nov 1, 2026 - Last checked: Nov 1, 2026 - Listed for: 5 days - Location: Sunnyvale, California, US - Employment type: Full-time[Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/1987641745525671/) ## Hiring at Meta Platforms - Open jobs: 1,310 - New in the last 7 days: After two weekly collections - Tracked since: Jul 11, 2026 [All Meta Platforms jobs](https://jobs.opennash.com/companies/meta-platforms/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Meta Platforms ### [Battery Engineering Intern, Cell Engineering (PhD)](https://jobs.opennash.com/companies/meta-platforms/jobs/0631d1efbf20bcc5a7e8/) Sunnyvale, California, US ### [Product Cost Engineer](https://jobs.opennash.com/companies/meta-platforms/jobs/f4979cd0d29e2cb9ea74/) Sunnyvale, California, US ### [Silicon Packaging Engineer](https://jobs.opennash.com/companies/meta-platforms/jobs/17cca45584268b418614/) Sunnyvale, California, US ### [Wireless Engineering Intern](https://jobs.opennash.com/companies/meta-platforms/jobs/ce592aa6e497df0d1e9d/) Sunnyvale, California, US ### [Business Analytics Intern, RL Devices Operations](https://jobs.opennash.com/companies/meta-platforms/jobs/8918617b5a9eb74f5044/) Sunnyvale, California, US ## Similar jobs at other companies ### [ASIC & FPGA Verification Engineer Stf - E4](https://jobs.opennash.com/companies/lockheed-martin/jobs/58c48e168348ca7316aa/) Lockheed Martin · Denver, CO, Sunnyvale, CA ### [ASIC Verification Engineer, Ring/Blink ASIC Team](https://jobs.opennash.com/companies/amazon/jobs/8a7a15ab898e95812700/) Amazon · US, MA, North Reading ### [Principal Engineer - ASIC Verification](https://jobs.opennash.com/companies/nokia/jobs/d4ca8759ec58ced18efc/) Nokia · United States ### [Staff Engineer - ASIC Verification](https://jobs.opennash.com/companies/nokia/jobs/7af73214891d8b99b856/) Nokia · United States ### [Senior ASIC Verification Engineer](https://jobs.opennash.com/companies/nvidia/jobs/e7d9bfd06d71ce0e4ea4/) NVIDIA · US, CA, Santa Clara OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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