[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Meta Platforms jobs](https://jobs.opennash.com/companies/meta-platforms/) · [Search jobs](/search/) Meta Platforms · Menlo Park, CA +1 more # Hardware Engineer, AI Accelerator Module Design Menlo Park, CA +1 more Design Listed on Meta Platforms’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/2554796438372458/) [OpenNash Jobs](https://jobs.opennash.com/) / [Meta Platforms](https://jobs.opennash.com/companies/meta-platforms/) / Hardware Engineer, AI Accelerator Module Design ## Job description The Hardware Design, Rack-scale Technology and Platforms (HDRTP) engineering team designs, develops, validates, and delivers the hardware platforms that power Meta's AI and HPC infrastructure, deployed in data centers worldwide. Our designs are published for industry adoption through the Open Compute Project Foundation. We are seeking an AI Accelerator Module Design Engineer to own the electrical and PCB design of accelerator modules supporting Meta's custom silicon (MTIA) and third-party AI accelerators. You will own module-level electrical design end to end from requirements and ASIC package-to-board co-design through schematic, stackup, power delivery, bring-up, and volume production on one or more programs. You will work within established design methodologies and reference architectures, and contribute improvements to them. You will drive cross-domain trade-offs between signal integrity, power integrity, thermal, mechanical, and cost, partnering with senior engineers and architects on the most ambiguous decisions. You will operate independently on your program's scope in a fast-moving environment. ## Responsibilities - Own the electrical design and PCB implementation of AI accelerator modules for high-performance, high-power custom silicon (MTIA) and third-party accelerators - Contribute to module requirements and specifications in partnership with ASIC, platform, rack, and systems architecture teams Execute ASIC package-to-board co-design, including breakout routing, substrate interaction, and escape feasibility analysis for high pin-count devices - Design power delivery networks for high-current loads, including DC-DC topology selection, decoupling strategy, and plane/stackup partitioning - Implement high-speed interface design across PCIe Gen5/Gen6, CXL, DDR5/LPDDR, HBM, and Ethernet up to 800G, including simulation-guided stackup and channel budgeting - Partner with Signal and Power Integrity teams on SI/PI analysis and simulation-to-measurement correlation for your designs - Participate in and prepare module-level design reviews; ensure schematic, layout, and DFM/DFT readiness for your designs - Lead board bring-up and debug; root-cause electrical, power, and interoperability failures and drive design fixes to closure - Work with ODM/JDM partners through NPI-to-mass-production cycles, holding partners to Meta design standards and schedule - Contribute to reusable reference designs, design-rule libraries, and design automation; support publication through the Open Compute Project - Evaluate emerging technologies with industry partners – HDI and advanced substrates, embedded components, novel materials - Collaborate across hardware, firmware, mechanical, thermal, and manufacturing teams to resolve cross-functional issues - Share knowledge and help onboard other PCB/module design engineers ## Qualifications BS in Electrical Engineering, Computer Engineering, or a related technical discipline - 6+ years of experience in electrical and PCB design for high-speed, high-power digital systems (servers, accelerators, networking, or HPC) Experience taking at least one complex custom board or module design from concept through volume production - Proficiency with EDA tools for schematic capture and PCB design (Cadence Allegro/OrCAD, Altium Designer, or equivalent) Experience with high-speed digital interface design (PCIe, CXL, DDR4/DDR5, HBM, Ethernet 25G+) and SerDes-based channel design Experience with power delivery network design for high-current loads, including DC-DC topology selection and decoupling strategy Experience with board bring-up, debug, and failure analysis using oscilloscopes, VNAs, TDR, and power analyzers Experience communicating technical trade-offs clearly in writing and verbally - 8+ years of experience in module or board design for AI/ML accelerators, data center, or HPC hardware MS in Electrical Engineering with emphasis on electromagnetics, signal integrity, or power electronics Scripting or design-automation experience (Python, SKILL/LISP, or equivalent) Experience collaborating across hardware, firmware, mechanical, thermal, and manufacturing teams Exposure to ASIC or GPU package-to-board co-design and breakout routing for high pin-count devices Contributions to open-source hardware or the Open Compute Project, or external technical publications Experience with liquid-cooled or thermally-constrained module design Hands-on experience with SI/PI simulation tools (Ansys HFSS, Cadence Sigrity, Keysight ADS/PathWave, or equivalent) Experience with HDI, rigid-flex, embedded component, or advanced substrate technologies Experience designing accelerator modules for custom in-house silicon Experience working with external ODM/JDM or component partners Experience with next-generation interconnect: PCIe Gen6, CXL 3.x, UCIe, scale-up fabrics, or co-packaged optics ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 7 days - Location: Menlo Park, CA +1 more[Apply on Meta Platforms’s careers site →](https://www.metacareers.com/jobs/2554796438372458/) ## More jobs at Meta Platforms ### [Application Manager, Procurement](https://jobs.opennash.com/companies/meta-platforms/jobs/a872d90bcaac7ae2e178/) Menlo Park, CA +1 more ### [Component Quality Engineer, Optics](https://jobs.opennash.com/companies/meta-platforms/jobs/633641368da21ba1cda6/) Menlo Park, CA +1 more ### [Global Security Core Technology Director](https://jobs.opennash.com/companies/meta-platforms/jobs/9ac36be2c17ba9d1a8e5/) Menlo Park, CA +1 more ### [Hardware Reliability Engineer](https://jobs.opennash.com/companies/meta-platforms/jobs/76eb2c7b08602cf35a89/) Menlo Park, CA +1 more ### [NPI Program Manager](https://jobs.opennash.com/companies/meta-platforms/jobs/82c637479d118ba7a97c/) Menlo Park, CA +1 more ## Similar jobs at other companies ### [System Validation Engineer (AI Accelerator Platform)](https://jobs.opennash.com/companies/qualcomm/jobs/12881cd796d7178afaa9/) Qualcomm · Tijuana, Baja California, Mexico ### [Electrical Engineer, Hardware Module Lead | General Dynamics](https://jobs.opennash.com/companies/general-dynamics/jobs/e901677d6d61e81760c3/) General Dynamics · Pittsfield, MA, US ### [Power Module Product Quality Hardware Engineer](https://jobs.opennash.com/companies/infineon-technologies/jobs/aa418727600f922bebdc/) Infineon Technologies · El Segundo, CA, Andover, MA ### [Systems Development Engineer, GPU & AI Accelerator Servers, AWS Hardware Engineering](https://jobs.opennash.com/companies/amazon/jobs/8deec31c0ca9b9c82a07/) Amazon · US, CA, Cupertino ### [UBS Card Center - Senior Hardware Security Module Engineer 80–100%](https://jobs.opennash.com/companies/ubs/jobs/bea8819ddc99667401d9/) UBS · United States OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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