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MediaTek · HsinChu

# Senior Digital Design Engineer

HsinChu Senior individual contributor Design 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120260709007)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / Senior Digital Design Engineer

## Job description

1. 4/5/6G modem Hardware platform IP and Subsys digital design and PPA optimization 2.

### Define hardware architecture of a digital IP/system

Include Clock, Bus (AXI/APB/NOC/…), Async design, high speed IF, new IP for sub-sys design topic 3. Subsys integration from RTL to gate level including timing closure and testability 4. Design methodology and integration flow improvement #LI-LL1

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: HsinChu[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120260709007)

## More jobs at MediaTek

### [2027 Campus_Analog / RF Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/ce89f637b48962b04cc8/)

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### [2027 Campus_Communication IC Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/3324edb0c6769ea8989d/)

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### [2027 Campus_Design Verification Engineer](https://jobs.opennash.com/companies/mediatek/jobs/6667382f30e996df45d8/)

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### [2027 Campus_Digital Circuit Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/a6bf42e9573360e1e151/)

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### [2027 Campus_Digital IC Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/0ba55e063654663af701/)

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