[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All MediaTek jobs](https://jobs.opennash.com/companies/mediatek/) · [Search jobs](/search/)

MediaTek · San Jose, CA

# Memory Packaging Engineer

San Jose, CA Operations 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MUS120260605001)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / Memory Packaging Engineer

## Job description

Mediatek is seeking a visionary and memory packaging technical leader to join our US team for Advanced Packaging Development. In this strategic role, you will lead and drive the development of cutting-edge 2.5D/3D packaging and memory subsystem solutions critical to our Datacenter/HPC, AI, Automotive, and Computing business units. You will serve as the key technical coordinator to bridge internal cross-functional teams, external customers, and external manufacturing partners.

Your team’s mission is to lead the memory roadmap that meets the roadmap of the advanced packaging technologies and deliver the product from concept through to mass production. We are looking for an owner who combines deep technical expertise with strategic thinking, supply chain management experience, and a solid commitment to customer obsession.

### Work Location

San Jose, CA, or San Diego, CA Roles and Responsibilities:
- Supports MediaTek’s Memory packaging technology development including but not limited to HBM package, cHBM, LPDDR package for mobile applications, In Package Memory (IPM) for Edge AI, etc.

### Technical Leadership and Development
- Lead the memory roadmap development and package integration plan. Collaborate closely with IP, ASIC design, package design, Signal Integrity (SI), Power Integrity (PI), Thermal and modeling technologies, Product Engineering, and Test Engineering teams to enable innovative solutions.

### Supply Chain and Technical Partner Management
- Establish and manage third-party relationships with memory vendors. Drive material selection and BOM optimization to ensure manufacturability to meet electrical, mechanical, thermal, and system-level requirements.

### Communication and Stakeholder Management
- Monitor and report project progress, supply chain performance, and manufacturing metrics to senior management. Serve as the primary interface for external customers and key enablement partners to ensure alignment on product quality, reliability, system needs, and optional requirements.

### Travel
- Domestic and international travel required (10-15%) to closely collaborate with partners/suppliers, customer engagements, and internal team alignment.

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: San Jose, CA[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MUS120260605001)

## More jobs at MediaTek

### [3DIC Memory DTCO Engineer](https://jobs.opennash.com/companies/mediatek/jobs/dffadecaf6a3c8d32b03/)

San Jose, CA

### [Integrated Voltage Regulator (IVR) Engineering Lead](https://jobs.opennash.com/companies/mediatek/jobs/2c64a8c7282205cd9877/)

San Jose, CA

### [Package Development/NPI Engineer](https://jobs.opennash.com/companies/mediatek/jobs/e7af4d5d7b3bfa744dd8/)

San Jose, CA

### [Performance Modeling Engineer](https://jobs.opennash.com/companies/mediatek/jobs/aa0cbea0ee9a263568f8/)

San Jose, CA

### [Principal DV Engineer](https://jobs.opennash.com/companies/mediatek/jobs/e667594bf771ec7dff33/)

San Jose, CA

## Similar jobs at other companies

### [Memory Packaging Engineer](https://jobs.opennash.com/companies/apple/jobs/227bfc6128fea8e95e9a/)

Apple · Santa Clara, United States of America

### [Memory Control Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/cb2d85f981a23d95b89d/)

Qualcomm · San Diego, California, United States of America

### [Memory Hardware Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/a085758c5fdaa546bc30/)

Microsoft · United States, Idaho, Boise, Washington, Redmond

### [Design Verification Engineer — Memory Subsystem](https://jobs.opennash.com/companies/qualcomm/jobs/b8ebd0b1780b1fe42172/)

Qualcomm · Santa Clara, California, United States of America

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)