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MediaTek · San Jose, CA

# Sr. Staff Memory Design Engineer

San Jose, CA Senior individual contributor Design 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MUS120260312000)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / Sr. Staff Memory Design Engineer

## Job description

MediaTek’s advanced Memory Design team in San Jose is looking for a high-performance senior memory design engineer to define and design custom memory and circuits for next generation ASICs for Cloud AI and Data center applications.
- Collaborate closely with product and architecture teams to design TCAM, SRAM, CPU caches with different PPA requirements for Cloud AI ASICs.
- Advance DTCO optimization techniques in circuits and architecture to gain PPA beyond process entitlement.
- Design dual rail custom memories from start to finish to meet customer PPA spec.
- Mentor, guide, and direct other designers, while being hands-on in digital circuit design, especially targeting memories.
- Highly organized and independent design engineer who can multi-task and closely collaborate with worldwide design and CAD teams. #LI-WC2

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: San Jose, CA[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MUS120260312000)

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Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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