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MediaTek · Austin, TX

# Senior RTL Engineer/Lead

Austin, TX Manager or lead Operations 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MUS120260324002)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / Senior RTL Engineer/Lead

## Job description

MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, and Wi-Fi 8. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world, enabling devices from smartphones, smart homes, and AI PCs to high-performance computing, automotive, and AI data centers.

As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity. About the Role We are looking for a Senior RTL Design Engineer / Lead to own micro‑architecture, RTL development, integration, and synthesis for complex IP and ARM CPU subsystems. In this role, you will drive RTL quality, collaborate with worldwide (WW) teams on specifications and deliverables, and work closely with DV and PD teams to ensure thoroughly verified, timing‑clean designs.

### Key Responsibilities

Define micro‑architecture for complex IP blocks and ARM CPU subsystems based on high‑level specifications. Develop high‑quality RTL (coding and integration) and perform synthesis for complex IP and CPU subsystems. Run RTL quality checks (e.g., Lint, CDC, LEC/equivalence checks) and ensure RTL is robust, reusable, and signoff‑ready. Generate and refine timing constraints; collaborate with Physical Design teams to ensure RTL meets timing and implementation goals.

Work with DV teams to define test plans, review coverage, and thoroughly verify RTL functionality. Collaborate with DFT teams to help improve test coverage and support DFT insertion requirements. Partner with worldwide cross‑functional teams to align on specifications, interfaces, and delivery milestones. Use strong debugging and scripting skills to analyze issues, automate flows, and improve design productivity.

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: Austin, TX[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MUS120260324002)

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