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MediaTek · Singapore

# Engineer/Staff Engineer – Chip Physical Verification CAD

Singapore Senior individual contributor Operations 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MSL120260930001)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / Engineer/Staff Engineer – Chip Physical Verification CAD

## Job description

The MediaTek Physical Verification team is seeking a qualified candidate to help define and deliver physical sign-off flows and solutions for SoC design, with a focus on enabling technology at advanced process nodes.

### What you will do
- Co-work with various teams (PDK, DFM, MF, Designers) to code and maintain DRC/LVS/ANT/DMY/ERC/LPE/ESD rule deck for various processes
- Develop layout implementation flow and physical verification flow
- Co-work with QA team to reduce the PDKs/Rule deck defects
- Perform full-chip physical verification such as debugging DRC/LVS/ERC
- Implement automation scripts in C-shell, Python and Perl
- Explore and apply AI techniques (e.g., LLM-assisted script generation) to improve DRC/LVS/ERC rule deck development, defect triage, and overall physical verification productivity #LI-WC1

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: Singapore[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MSL120260930001)

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Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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