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MediaTek · HsinChu

# <GPU>GPU Design Verification Lead

HsinChu Manager or lead Design 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120260803001)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / <GPU>GPU Design Verification Lead

## Job description
- Lead GPU verification efforts across unit, subsystem, and full-chip levels, partnering closely with GPU architects, RTL design leads, performance engineers, modeling teams, and software/firmware teams.
- Develop a deep understanding of GPU specifications and microarchitecture, including the 3D graphics pipeline, compute workloads, shader cores, memory hierarchy, cache/coherency, command processing, scheduling, and control subsystems.
- Define the overall verification strategy, methodology, test architecture, milestones, and quality metrics for assigned GPU IPs and/or top-level GPU integration.
- Drive creation and execution of comprehensive verification plans, ensuring traceability from architectural and RTL specifications through test implementation, functional coverage, assertions, and closure.
- Lead development and maintenance of scalable SystemVerilog/UVM verification environments, including reusable agents, BFMs, scoreboards, reference models, checkers, and HW/SW co-simulation infrastructure.
- Guide the team in developing directed, constrained-random, stress, error-injection, and scenario-based tests for graphics, compute, memory, and control features.
- Drive functional and code coverage closure through rigorous coverage analysis, identification of verification gaps, and creation of targeted tests for corner cases and late-stage bug escapes.

### Own regression health for the verification scope
- establish regression strategy, monitor quality metrics, prioritize failures, coordinate triage, and drive root-cause resolution with design and architecture teams.
- Review verification plans, testbench architecture, test code, coverage models, and debug approaches; provide technical mentorship and guidance to DV engineers.
- Partner with performance, architecture, and design teams to develop performance-verification workloads, execute emulation/prototyping runs, analyze bottlenecks, and support performance, power, and area (PPA) optimization.
- Drive efficient debug of complex RTL, testbench, firmware, and HW/SW co-simulation failures, clearly communicating root cause, impact, and resolution plans to cross-functional stakeholders.
- Collaborate effectively across geographically distributed teams and communicate verification status, risks, and closure plans to project leadership. #LI-LL1

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: HsinChu[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120260803001)

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