[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All MediaTek jobs](https://jobs.opennash.com/companies/mediatek/) · [Search jobs](/search/) MediaTek · HsinChu # Design Verification Technical Manager (High-Speed IO: PCIe & USB) HsinChu Manager or lead Design Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there. [Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120261015001) [OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / Design Verification Technical Manager (High-Speed IO: PCIe & USB) ## Job description ### Role Overview We are seeking two Senior Design Verification Engineers to architect and execute comprehensive verification strategies for our next-generation high-performance SoCs. In this role, you will take technical ownership of IP-level and subsystem-level verification for mission-critical high-speed serial protocols, specifically PCIe and USB. Beyond standard UVM and constrained-random methodologies, you will be a catalyst for modernizing our verification flow—integrating AI/LLM-assisted workflows to accelerate test writing, assertion generation, log triage, and coverage closure. ### Key Responsibilities - Testbench Architecture & Test Planning a. Define, author, and review detailed Verification Plans (vPlans) from architectural and micro-architectural specifications through tape-out sign-off. b. Architect, build, and maintain modular, scalable, and reusable UVM-based testbenches from scratch, including custom drivers, monitors, scoreboards, predictors, and reference models. c. Drive constrained-random test generation, SystemVerilog Assertions (SVA), and functional coverage metrics to achieve 100% coverage sign-off. - High-Speed Subsystem & Protocol Verification a. Lead IP- and subsystem-level verification for PCIe (Gen 4/5/6) and USB (USB 3.2 / USB4 / Type-C) controllers and PHY interfaces (PIPE/UTMI). b. ### Verify complex protocol dynamics, including i. Link Training and Status State Machine (LTSSM) transitions and recovery loops. ii. Low-power states (ASPM L0s, L1, L1.1/L1.2, USB U1/U2/U3) and power management handshakes. iii. Equalization, credit flow control, split transactions, packet ordering, and error injection/recovery flows. iv. Integrate and debug industry-standard Verification IPs (VIPs) from leading vendors (Synopsys, Cadence, Avery/Siemens). - Automation, Tooling & Infrastructure a. Build scripts for regression health monitoring, automated failure extraction, seed sweeping, and automated coverage report merging. b. Collaborate closely with Design, Emulation, Firmware, and Post-Silicon Validation teams to debug complex system-level failures. - AI & LLM-Augmented Verification Workflows a. Actively deploy and refine LLM-assisted techniques to accelerate the DV lifecycle: b. Leverage AI tools to generate boilerplate UVM components, corner-case test vectors, and SVA properties from design specs. c. Implement automated triage agents using LLMs to ingest simulation log files, pinpoint root-cause failure signatures, and summarize crash states. d. Optimize prompt engineering and programmatic interfaces (APIs, CLI scripts) to build reproducible team-wide verification copilots. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 23, 2026 - Last checked: Oct 23, 2026 - Listed for: Under a day - Location: HsinChu[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120261015001) ## More jobs at MediaTek ### [2027 Campus_Analog / RF Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/ce89f637b48962b04cc8/) HsinChu ### [2027 Campus_Communication IC Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/3324edb0c6769ea8989d/) HsinChu ### [2027 Campus_Design Verification Engineer](https://jobs.opennash.com/companies/mediatek/jobs/6667382f30e996df45d8/) HsinChu ### [2027 Campus_Digital Circuit Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/a6bf42e9573360e1e151/) HsinChu ### [2027 Campus_Digital IC Design Engineer](https://jobs.opennash.com/companies/mediatek/jobs/0ba55e063654663af701/) HsinChu ## Similar jobs at other companies ### [Technical Lead- Design Verification](https://jobs.opennash.com/companies/arrow-electronics/jobs/3e8b865b5ae7871e5a96/) Arrow Electronics · Garden, Bangalore-, Karnātaka, India ### [Staff high speed datapath and circuit design engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/536c70a9efc82596b734/) Sandisk ### [High Speed IO Design Engineer](https://jobs.opennash.com/companies/sandisk/jobs/d0f7fdbc2af0ca0098d7/) Sandisk ### [Water Treatment Design Engineer - Global High Tech](https://jobs.opennash.com/companies/ecolab/jobs/a1a485d2ff3570647142/) Ecolab · Barcelona, Spain ### [Staff Engineer, Design Verification - High-Speed Interface IP](https://jobs.opennash.com/companies/synopsys/jobs/415048c51aa743620d18/) Synopsys · Noida, India OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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