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MediaTek · Singapore

# [2027 Campus Hire] Design Verification Engineer

Singapore Design 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MSL120230324007)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / [2027 Campus Hire] Design Verification Engineer

## Job description

[What you will do]
- Module/IP/SOC design verification.
- Develop and review test plans.
- Develop verification environment/testbench in Module/IP/SOC level.
- Develop verification IP and reference model.
- Implement test with randomization-based coverage driven verification methodology.
- Implement functional and functional/code coverage closure.
- Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC.
- Low Power verification.
- Formal verification.
- Verification automation flow. #LI-WC1

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: Singapore[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MSL120230324007)

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Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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