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MediaTek · HsinChu

# Memory Controller Digital Engineer

HsinChu Finance & Accounting 

Listed on MediaTek’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there.
[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120260323020)

[OpenNash Jobs](https://jobs.opennash.com/) / [MediaTek](https://jobs.opennash.com/companies/mediatek/) / Memory Controller Digital Engineer

## Job description
- Memory system architecture design and RTL implementation on SOC
- DRAM controller IP development, include high-speed digital PHY, high-efficiency scheduler, low power management unit, and design for test.
- DRAM controller IP integration (Front-end RTL and design constraint integration, digital IC design flow QC, static timing analysis, project integration task coordination) #LI-LL1

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 23, 2026
- Last checked: Oct 23, 2026
- Listed for: Under a day
- Location: HsinChu[Apply on MediaTek’s careers site →](https://careers.mediatek.com/en/jobs/MTK120260323020)

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Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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