[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Intel jobs](https://jobs.opennash.com/companies/intel/) · [Search jobs](/search/) Intel · Malaysia, Penang # Senior Core Design Verification Engineer Malaysia, Penang Senior individual contributor Design Listed on Intel’s official careers site. Posted September 23, 2026. Check that it is still open and apply there. [Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/Malaysia-Penang/Senior-Core-Design-Verification-Engineer_JR0287289) [OpenNash Jobs](https://jobs.opennash.com/) / [Intel](https://jobs.opennash.com/companies/intel/) / Senior Core Design Verification Engineer ## Job description ### Job Details Job Description: The Role and Impact As a CPU Design Verification Engineer, you will play a key role in ensuring the reliability and functionality of Intel's next-generation CPUs. You will develop and execute verification plans, test benches, and environments to validate CPU logic designs against architectural specifications, uncover bugs, and drive corrective measures. Your daily contributions will directly impact the performance and quality of Intel's cutting-edge CPU products, enabling advancements in computing innovation. Business Group The Silicon and Platform Engineering Group (SPE) is at the forefront of designing and developing Intel's computing platforms, delivering world-class silicon solutions that drive technological breakthroughs. SPE focuses on advancing CPU architectures, ensuring high-quality silicon designs, and supporting Intel's mission to shape the future of computing. ### Key Responsibilities Develop and implement comprehensive verification plans, test benches, and environments to ensure full coverage of CPU logic functionality. Execute simulation models to validate CPU microarchitecture designs, analyze power and timing, and identify design bugs. Debug and root-cause issues in pre-silicon environments, applying corrective actions to resolve failing tests. Collaborate with CPU architects, RTL developers, and physical design teams to optimize verification processes and meet performance, power, and functional goals. Maintain and enhance existing functional verification methodologies and infrastructure. Document test plans and lead technical reviews with design and architecture teams. Contribute to the definition and development of innovative CPU architectural and microarchitectural features. ### Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3+ years of hands-on experience in CPU design verification OR a Master's degree in a related field with 2+ years of experience OR a PhD with no prior professional experience. Proficiency in System Verilog and UVM for pre-silicon verification. Strong programming and scripting skills in Python, Perl, and C/C++. Solid understanding of CPU architecture and microarchitecture fundamentals. Experience debugging CPU or DFx issues in pre-silicon environments. Proven ability to analyze, debug, and solve complex technical problems. ### Preferred Qualifications Knowledge of TAP (Test Access Port) and DFx methodologies. Experience with ASIC or FPGA design verification, particularly with x86 CPU designs. Familiarity with emulation or FPGA prototyping and post-silicon validation/debug processes. Background in fault-simulation tools and methodologies. Demonstrated ability to work effectively in a fast-paced, collaborative environment. Join us and be part of a dynamic team that is driving innovation in CPU design and verification. Your expertise will help deliver industry-leading technologies that shape the future of computing. ### Job Type Experienced Hire Shift: Shift 1 (Malaysia) ### Primary Location Malaysia, Penang Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. - Job posting details (such as work model, location or time type) are subject to change. ### ADDITIONAL INFORMATION - Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. ## At a glance - Posted by the employer: Sep 23, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 25 days - Location: Malaysia, Penang[Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/Malaysia-Penang/Senior-Core-Design-Verification-Engineer_JR0287289) ## More jobs at Intel ### [CPU Design Verification Engineer](https://jobs.opennash.com/companies/intel/jobs/96b4290bcef17eca2671/) Malaysia, Penang ### [E-Core (Atom) CPU Layout Design Engineer](https://jobs.opennash.com/companies/intel/jobs/5fd12a284edfb238d36a/) Malaysia, Penang ### [E-Core CPU Design Automation Engineer](https://jobs.opennash.com/companies/intel/jobs/285cce13eff092655f80/) Malaysia, Penang ### [E-core CPU Clock Design Engineer](https://jobs.opennash.com/companies/intel/jobs/63e4d5f651fd5c1d642e/) Malaysia, Penang ## Similar jobs at other companies ### [Hardware Verification Engineer 2 - Azure Core](https://jobs.opennash.com/companies/microsoft/jobs/a8bbedaa8912c39a995c/) Microsoft · Serbia, Belgrade ### [Design Verification Engineer](https://jobs.opennash.com/companies/siemens/jobs/3469736e66b7ab53255d/) Siemens ### [NOC Design Verification Engineers (Engineer/Sr Engineer)](https://jobs.opennash.com/companies/qualcomm/jobs/012c5b47fdde2230c018/) Qualcomm · Bangalore, India ### [Design Verification Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/e0e64d6ed7ea9cff1d03/) Microsoft · India, Karnataka, Bangalore ### [BT - Design Verification Sr Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/8a4545cadb1eb8810d4d/) Qualcomm · Bangalore, India OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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