[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Intel jobs](https://jobs.opennash.com/companies/intel/) · [Search jobs](/search/) Intel · Us, OR # Process Integration and Yield Engineering PhD Intern US, Oregon, Hillsboro Early career $120,898.00-120,902.00 Operations Listed on Intel’s official careers site. Posted September 21, 2026. Check that it is still open and apply there. [Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Process-Integration-and-Yield-Engineering-PhD-Intern_JR0287132) [OpenNash Jobs](https://jobs.opennash.com/) / [Intel](https://jobs.opennash.com/companies/intel/) / Process Integration and Yield Engineering PhD Intern ## Job description ### Job Details Job Description: The Role and Impact: As a Process Integration and Yield Engineering PhD Intern at Intel, you will be at the forefront of semiconductor manufacturing innovation. In this role, you will develop and optimize cutting-edge manufacturing processes while improving defect management strategies and driving process yield enhancements in high-volume production environments. Collaborating with cross-functional engineering teams, you will address complex technical challenges, troubleshoot process issues, and implement continuous improvement initiatives. This hands-on internship is an opportunity to grow your expertise, gain invaluable experience, and contribute to Intel's mission of delivering world-class semiconductor products. ### Business group Intel Foundry plays a crucial role in advancing Intel's leadership in semiconductor manufacturing. As part of this team, you will contribute to Intel's efforts to deliver innovative technologies that enrich lives worldwide. The group focuses on developing and optimizing manufacturing processes that drive Intel's industry-leading products while supporting continuous improvement in high-volume production environments. ### Key Responsibilities - Contribute to the development and optimization of module processes and integration flows for semiconductor manufacturing. - Analyze defect data, conduct experiments, and assist in risk assessments to support yield improvement initiatives. - Collaborate with cross-functional engineering teams to troubleshoot process flow issues and optimize metrology strategies. - Apply data analysis techniques to improve process performance and manufacturing efficiency. - Participate in continuous improvement efforts focused on enhancing production quality and output. - Engage in innovative projects to develop expertise and support Intel's business goals. ### Qualifications Minimum Qualifications: - Actively pursuing a PhD in Physics, Electrical Engineering, Material Science, or Chemistry. - Proficiency in microscopy techniques. - Background in circuit design and semiconductor device physics. - Basic scripting knowledge in Python or comparable programming languages. - Understanding of scan methodologies and automatic test pattern generation. - 3.0 GPA Preferred Qualifications: - 2nd or 3rD year PhD Graduate Students with course works including computer science-basic algorithms, and solid state/semiconductor physics, electronics/circuits designs, silicon process technologies, familiar with images analysis software and leading large visual computing models. Explore this exciting opportunity to innovate, refine your technical skills, and contribute to Intel's industry leadership in semiconductor manufacturing. Apply today to join a team that is committed to advancing technology and creating a lasting impact globally. Location & Immigration Information As you consider the opportunity to join Intel, relocation assistance may be available based on eligibility, current location, and the specifics of the role. This position is not eligible for employment-based visa/immigration sponsorship. Intel sponsors individuals for employment-based visas for positions where we experience a shortage of U.S. workers. These skills shortage roles are typically STEM positions requiring a Master's or PhD degree, or a Bachelor's degree with at least three years of post-degree related job experience. This position does not qualify for Intel sponsorship because it is either a non-STEM position, or a STEM position that only requires a Bachelor's degree and less than three years' experience. For information on Intel's immigration sponsorship guidelines, please see: [https://www.intel.com/content/www/us/en/jobs/hiring.html](https://www.intel.com/content/www/us/en/jobs/hiring.html) Additional Information This application is for internship starts in late Spring/Summer 2027, with consideration also given to candidates interested in year-long internship or co-op opportunities. You must be available to start work during this time frame. ### Life at Intel Job Type Student / Intern Shift: Shift 1 (United States of America) ### Primary Location US, Oregon, Hillsboro Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $120,898.00-120,902.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process. Work Model for this Role This role will require an on-site presence. - Job posting details (such as work model, location or time type) are subject to change. ### ADDITIONAL INFORMATION - Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. ## At a glance - Posted by the employer: Sep 21, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 27 days - Location: US, Oregon, Hillsboro - Pay: $120,898.00-120,902.00[Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Process-Integration-and-Yield-Engineering-PhD-Intern_JR0287132) ## More jobs at Intel ### [(Epi) - Module Development Engineer - (PhD Intern)](https://jobs.opennash.com/companies/intel/jobs/cad66e4dea67e7e1942a/) US, Oregon, Hillsboro ### [AMHS Equipment Engineer](https://jobs.opennash.com/companies/intel/jobs/4650e6ae9e5225053472/) US, Oregon, Hillsboro ### [Advanced Packaging Metrology Engineering Manager](https://jobs.opennash.com/companies/intel/jobs/532023bbb8a1d5ab928e/) US, Oregon, Hillsboro ### [Advanced Packaging Module Development Engineer](https://jobs.opennash.com/companies/intel/jobs/a3ef729399b287fc3515/) US, Oregon, Hillsboro ### [Advanced Packaging TD Plating Module Engineer](https://jobs.opennash.com/companies/intel/jobs/52bc6b4020a144e816be/) US, Oregon, Hillsboro ## Similar jobs at other companies ### [Process Integration & Yield Enhancement Managers](https://jobs.opennash.com/companies/taiwan-semiconductor/jobs/0ce8fe3e4ac98cf0bb5e/) Taiwan Semiconductor · Phoenix, AZ, US ### [Section Lead – Semiconductor Process Integration and Yield](https://jobs.opennash.com/companies/rtx/jobs/ab92970c8268718fabf5/) RTX ### [Sr. Section Lead – Semiconductor Process Integration and Yield](https://jobs.opennash.com/companies/rtx/jobs/c94a0eb076b2afd7bab6/) RTX ### [Dewar Process Integration Engineer Sr](https://jobs.opennash.com/companies/lockheed-martin/jobs/29802de3ac174f9fa6fd/) Lockheed Martin · Goleta, CA ### [Semiconductor Process Integration Engineer Sr](https://jobs.opennash.com/companies/lockheed-martin/jobs/0a5d4f76ebb271153c2b/) Lockheed Martin · Goleta, CA [Jobs in Oregon](/locations/us-or/)[Operations jobs](/functions/operations/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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