[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Intel · India, Bangalore # GPU Logic Design Engineer India, Bangalore Design Listed on Intel’s official careers site. Posted October 23, 2026. Check that it is still open and apply there. [Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/India-Bangalore/GPU-Logic-Design-Engineer_JR0288325) [OpenNash Jobs](https://jobs.opennash.com/) / [Intel](https://jobs.opennash.com/companies/intel/) / GPU Logic Design Engineer ## Job description ### Job Details Job Description: The Role and Impact: As a GPU Logic Design Engineer, you will be instrumental in developing the next generation of graphics IPs, contributing directly to the design and optimization of register transfer level (RTL) coding for cutting-edge GPU blocks. Your day-to-day work will involve creating high-performance logic designs, ensuring they meet power, performance, area, and timing goals. The work you do will be integral to delivering innovative solutions for Intel's graphics products, directly impacting millions of users worldwide. ### Business Group The Graphics IP team within Intel's Data Center Group (DCG) is dedicated to delivering world-class graphics and compute solutions for integrated, discrete, and data center AI products. Leveraging continuous innovation and engineering excellence, the team supports Intel's overall mission to drive technological advancements and deliver high-performance computing solutions. This role places you at the forefront of industry-leading graphics IP development efforts. ### Key Responsibilities Develop logic designs and create RTL code for graphics IPs, including compute, display, and media blocks. Optimize logic designs to meet power, performance, area, and timing goals, ensuring design integrity for physical implementation. Participate in defining the architecture and microarchitecture features of GPU blocks. Review verification plans to ensure design features are accurately validated across hierarchies. Drive unit-level verification and resolve RTL test failures, implementing corrective measures to ensure design correctness. Collaborate with SoC teams to ensure high-quality integration of GPU blocks. Utilize industry-standard tools and methodologies for design and verification. ### Qualifications Minimum Qualifications: Bachelor's degree or Masters in Computer Engineering, Computer Science, Electrical Engineering, or a related field. 4+ years M.Tech and 5+ B.tech with hands on experience in RTL coding, logic design, and verification processes for GPU or similar domains. Proficiency in Verilog/System Verilog and familiarity with hardware design flows and methodologies. Experience with synthesis, timing analysis, and structural design using tools such as Lint and CDC. Knowledge of computer architecture, microarchitecture, and static timing analysis. Proficiency in programming/scripting languages such as Python, Perl, or Shell scripting for automation. ### Preferred Qualifications Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field. Strong analytical skills and experience in low-power design and power optimization techniques. Familiarity with ASIC design flow and industry-standard verification tools/methodologies. Exposure to ML/AI and HPC workload knowledge. Effective team player with strong communication skills and a continuous learning mindset. Join a team that thrives on innovation and excellence, where your contributions will shape the future of graphics technology. Apply today and take the next step in advancing your career with Intel. ### Job Type Experienced Hire Shift: Shift 1 (India) ### Primary Location India, Bangalore Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. - Job posting details (such as work model, location or time type) are subject to change. ### ADDITIONAL INFORMATION - Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. ## At a glance - Posted by the employer: Oct 23, 2026 - First seen by OpenNash: Oct 25, 2026 - Last checked: Nov 1, 2026 - Listed for: 9 days - Location: India, Bangalore[Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/India-Bangalore/GPU-Logic-Design-Engineer_JR0288325) ## Hiring at Intel - Open jobs: 801 - New in the last 7 days: After two weekly collections - Tracked since: Jul 10, 2026 [All Intel jobs](https://jobs.opennash.com/companies/intel/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Intel ### [Analog Circuit Design Engineer](https://jobs.opennash.com/companies/intel/jobs/a5d0948219cb3844214f/) India, Bangalore ### [Analog Circuit Design Engineering Manager](https://jobs.opennash.com/companies/intel/jobs/0b086c10bf42e9b1b7d3/) India, Bangalore ### [Analog Design Engineer](https://jobs.opennash.com/companies/intel/jobs/f8af096f7a6fd31f2831/) India, Bangalore ## Similar jobs at other companies ### [Software Engineer - C++ / Digital Logic Design](https://jobs.opennash.com/companies/siemens/jobs/afc168c9cc5c1ae44fbb/) Siemens ### [Senior Digital Design Engineer GPU Hardware Design - Athens](https://jobs.opennash.com/companies/qualcomm/jobs/39dcf01aab3647c8184d/) Qualcomm · Marousi, Greece ### [Senior Logic Design Engineer - Microsoft Azure](https://jobs.opennash.com/companies/microsoft/jobs/218c1b875656e03bca74/) Microsoft · Israel, Haifa, Multiple Locations ### [GPU (RTL) Design - Sr Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/3d66e49ab10d1b9af570/) Qualcomm · Bangalore, India OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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