[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Intel jobs](https://jobs.opennash.com/companies/intel/) · [Search jobs](/search/) Intel · India, Bangalore # Analog Circuit Design Engineer India, Bangalore Design Listed on Intel’s official careers site. Posted October 8, 2026. Check that it is still open and apply there. [Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/India-Bangalore/Analog-Circuit-Design-Engineer_JR0287856) [OpenNash Jobs](https://jobs.opennash.com/) / [Intel](https://jobs.opennash.com/companies/intel/) / Analog Circuit Design Engineer ## Job description ### Job Details Job Description: The Role and Impact: As an Analog Circuit Design Engineer, you will play a pivotal role in designing advanced analog circuits for cutting-edge technologies. Your day-to-day work will focus on creating high-performance, power-optimized circuits for analog and mixed-signal IPs in advanced process nodes. By collaborating with cross-functional teams, you will shape Intel's ability to deliver robust and innovative solutions that meet global technology demands. ### Business Group You will join the Central Engineering Group (CEG), a team dedicated to enabling Intel's success through world-class engineering capabilities. CEG is focused on the development of state-of-the-art technologies, contributing to Intel's leadership in innovation and product excellence. ### Key Responsibilities - Design, develop, and optimize analog circuits for high-speed SerDes, memory interfaces, and advanced process nodes. - Extract key chip parameters, simulate analog behavior models, and validate designs against block specifications. - Create and execute comprehensive test plans to ensure functionality, reliability, and performance. - Collaborate with architecture and layout teams to optimize circuits for power, area, timing, and electrical robustness. - Perform post-silicon debug to analyze and resolve circuit issues, ensuring readiness for high-volume manufacturing. - Continuously improve design methodologies to enhance innovation, efficiency, and turnaround times. - Utilize industry-standard tools such as Cadence Virtuoso, SPICE simulators, and post-layout extraction tools. ### Qualifications Minimum Qualifications: - Bachelor's degree in Electrical Engineering or a related field with 6+ years of experience, or Master's degree with 4+ years of experience, or PhD with 2+ years of experience in analog circuit design. - Proficiency in designing high-speed analog/mixed-signal circuits, including PLLs, SerDes, regulators, and clocking circuits. - Expertise in CMOS design fundamentals, circuit simulation tools, and modeling. - Experience with EDA tools such as Cadence Virtuoso, Spectre, PrimeSim, DRC, LVS, and post-layout extraction. - Familiarity with optimizing circuits for power efficiency, area, and yield goals. ### Preferred Qualifications - Experience in post-silicon validation, reliability testing, and debugging. - Knowledge of scripting languages such as Python, TCL, or Perl for design automation tasks. - Familiarity with high-speed interface interconnect modeling and simulation. - Strong analytical and problem-solving skills, along with a demonstrated ability to lead technical initiatives. - Proven ability to work in fast-paced environments and mentor junior engineers. If you are excited about driving innovation and crafting impactful analog designs, we encourage you to apply and contribute to transforming technology at Intel. ### Job Type Experienced Hire Shift: Shift 1 (India) ### Primary Location India, Bangalore Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. - Job posting details (such as work model, location or time type) are subject to change. ### ADDITIONAL INFORMATION - Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. ## At a glance - Posted by the employer: Oct 8, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 10 days - Location: India, Bangalore[Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/India-Bangalore/Analog-Circuit-Design-Engineer_JR0287856) ## More jobs at Intel ### [Analog Circuit Design Engineering Manager](https://jobs.opennash.com/companies/intel/jobs/0b086c10bf42e9b1b7d3/) India, Bangalore ### [Analog Design Engineer](https://jobs.opennash.com/companies/intel/jobs/f8af096f7a6fd31f2831/) India, Bangalore ### [Board Level Power Delivery Design Engineer](https://jobs.opennash.com/companies/intel/jobs/f2aa02b9791a0c3a5ee7/) India, Bangalore ## Similar jobs at other companies ### [Senior Quantum Engineer - Cryo-CMOS Analog Circuit Design](https://jobs.opennash.com/companies/microsoft/jobs/6b112ef80b58b548db0b/) Microsoft · Denmark, Copenhagen, Kongens Lyngby ### [Senior Staff Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/9c9c9ee8de475c168163/) Sandisk ### [Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/04c89e21c7a143aa3d7b/) Sandisk ### [Memory Circuit Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/26b6bf9f8b20500a5700/) Qualcomm · Bangalore, India ### [Analog Circuit Design - IO Design Engineer](https://jobs.opennash.com/companies/samsung-electronics/jobs/fe8b6b8c4ba5ea825c38/) Samsung Electronics · SSIR, Goldstone, Bangalore, India [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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