[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Intel jobs](https://jobs.opennash.com/companies/intel/) · [Search jobs](/search/) Intel · Malaysia, Penang # Senior Core Design Verification Engineer Malaysia, Penang Senior individual contributor Design Listed on Intel’s official careers site. Posted September 23, 2026. Check that it is still open and apply there. [Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/Malaysia-Penang/Senior-Core-Design-Verification-Engineer_JR0287288) [OpenNash Jobs](https://jobs.opennash.com/) / [Intel](https://jobs.opennash.com/companies/intel/) / Senior Core Design Verification Engineer ## Job description ### Job Details Job Description: The Role and Impact As a CPU Design Verification Engineer, you will play a pivotal role in ensuring the functionality and reliability of cutting-edge CPU designs. Your day-to-day responsibilities will include developing and executing verification plans to thoroughly test CPU microarchitectures, identifying and resolving design bugs, and collaborating with cross-functional teams to ensure performance, power, and efficiency goals are met. Your efforts will directly contribute to the delivery of innovative and high-quality products, reinforcing Intel's position as a leader in the semiconductor industry. Business Group The Silicon and Platform Engineering Group (SPE) leads the development of silicon and platform solutions that drive Intel's technological advancements. This team focuses on designing, verifying, and delivering high-performance CPUs and platforms to meet evolving market demands. By joining this group, you will be part of a collaborative and dynamic environment that supports Intel's mission to create world-changing innovations. ### Key Responsibilities Perform functional verification of CPU logic to ensure designs meet specification requirements. Develop and execute IP verification plans, test benches, and environments to ensure comprehensive coverage of CPU microarchitecture specifications. Define and run system simulation models to verify design functionality, analyze power and timing, and uncover bugs. Debug issues in the presilicon environment, replicate failures, and implement corrective measures. Collaborate with CPU architects, RTL developers, and physical design teams to optimize the verification process and achieve functional, performance, and power targets. Document verification plans and lead technical reviews with design and architecture teams. Maintain and enhance existing verification infrastructure and methodologies. Actively contribute to the definition of CPU architecture and microarchitecture features. ### Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. At least 4 years of experience in ASIC or FPGA design verification, preferably with CPU or E-Core designs. Proficiency in verification languages such as System Verilog and UVM. Strong scripting and programming skills (e.g., Python, C/C++). Hands-on experience with industry-standard verification tools and methodologies. ### Preferred Qualifications Master's degree in Electrical Engineering, Computer Engineering, or a related field with 3 years of relevant experience OR PhD with no prior professional experience. Proven expertise in platform-level design verification and microprocessor-based systems. Exceptional problem-solving and debugging skills. Effective communication and collaboration abilities to work within dynamic, cross-functional teams. We invite you to bring your skills, creativity, and enthusiasm to this exciting opportunity. Join us in driving innovation and shaping the future of computing. ### Job Type Experienced Hire Shift: Shift 1 (Malaysia) ### Primary Location Malaysia, Penang Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. - Job posting details (such as work model, location or time type) are subject to change. ### ADDITIONAL INFORMATION - Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. ## At a glance - Posted by the employer: Sep 23, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 25 days - Location: Malaysia, Penang[Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/Malaysia-Penang/Senior-Core-Design-Verification-Engineer_JR0287288) ## More jobs at Intel ### [CPU Design Verification Engineer](https://jobs.opennash.com/companies/intel/jobs/96b4290bcef17eca2671/) Malaysia, Penang ### [E-Core (Atom) CPU Layout Design Engineer](https://jobs.opennash.com/companies/intel/jobs/5fd12a284edfb238d36a/) Malaysia, Penang ### [E-Core CPU Design Automation Engineer](https://jobs.opennash.com/companies/intel/jobs/285cce13eff092655f80/) Malaysia, Penang ### [E-core CPU Clock Design Engineer](https://jobs.opennash.com/companies/intel/jobs/63e4d5f651fd5c1d642e/) Malaysia, Penang ## Similar jobs at other companies ### [Hardware Verification Engineer 2 - Azure Core](https://jobs.opennash.com/companies/microsoft/jobs/a8bbedaa8912c39a995c/) Microsoft · Serbia, Belgrade ### [NOC Design Verification Engineers (Engineer/Sr Engineer)](https://jobs.opennash.com/companies/qualcomm/jobs/012c5b47fdde2230c018/) Qualcomm · Bangalore, India ### [Design Verification Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/e0e64d6ed7ea9cff1d03/) Microsoft · India, Karnataka, Bangalore ### [BT - Design Verification Sr Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/8a4545cadb1eb8810d4d/) Qualcomm · Bangalore, India ### [R&D Engineering, Staff Engineer - Design Verification/ VIP Verification Engineers](https://jobs.opennash.com/companies/synopsys/jobs/20c73d34cbd8b7178cdd/) Synopsys · Delhi, India [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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