[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Intel jobs](https://jobs.opennash.com/companies/intel/) · [Search jobs](/search/) Intel · Multiple locations # Senior Formal Verification Engineer – AI SoC Development Multiple locations Senior individual contributor $220,920.00-311,890.00 Operations Listed on Intel’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/US-California-Folsom/Senior-Formal-Verification-Engineer---AI-SoC-Development_JR0279196) [OpenNash Jobs](https://jobs.opennash.com/) / [Intel](https://jobs.opennash.com/companies/intel/) / Senior Formal Verification Engineer – AI SoC Development ## Job description ### Job Details Job Description: Intel’s AI SoC organization is driving innovation in next-generation ASICs for AI applications across edge and cloud. As a Senior Formal Verification Engineer, you will play a critical role in ensuring the functional correctness of complex digital designs using advanced formal methods. This position offers the opportunity to work on cutting-edge technology and shape verification strategies for AI SoCs. ### Key Responsibilities Own formal verification strategy and execution for complex SoC IP blocks and subsystems. Develop and maintain formal verification environments using SystemVerilog Assertions (SVA) and industry-standard formal tools. Write and review formal properties, constraints, and coverage goals to achieve exhaustive verification. Collaborate with design and simulation teams to identify corner cases and complement dynamic verification. Drive formal sign-off, including convergence analysis and coverage closure. Contribute to pre-silicon verification, chip bring-up, and post-silicon debug support. Mentor junior engineers and establish best practices for formal verification methodology ### Additional Responsibilities Define and develop scalable, reusable verification plans for block, subsystem, and SoC levels. Execute verification plans and run emulation and system simulation models to validate design, analyze power/performance, and uncover bugs. Debug and root-cause issues in the presilicon environment; implement corrective measures. Collaborate with architects, RTL developers, and physical design teams to improve verification of complex features. Document test plans and lead technical reviews with design and architecture teams. Incorporate and execute security verification activities within regression and debug tests. Maintain and enhance existing functional verification infrastructure and methodology. Apply learnings from post-silicon validation to improve coverage and quality for future products. ### Basic Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science with 10+ years of related experience. - 7+ years of experience in ASIC/SoC verification with at least 3+ years focused on formal verification. ### Preferred Qualifications - Expertise in formal verification methodologies and tools (e.g., JasperGold, VC Formal, Questa Formal). - Strong knowledge of System Verilog Assertions (SVA) and property-based verification. - Deep understanding of digital design concepts, clock domain crossings, and low-power design techniques. - Familiarity with UVM-based simulation environments and how formal complements dynamic verification. - Scripting skills (Python, TCL, Perl) for automation and flow optimization. - Ability to lead projects, work cross-functionally, and deliver under tight schedules. - Strong analytical skills, attention to detail, and a collaborative mindset. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. ### Job Type Experienced Hire Shift: Shift 1 (United States of America) ### Primary Location US, California, Folsom Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin Business group: Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society. ### Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. ### Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. - Job posting details (such as work model, location or time type) are subject to change. ### ADDITIONAL INFORMATION - Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 18, 2026 - Listed for: 100 days - Location: Multiple locations - Pay: $220,920.00-311,890.00[Apply on Intel’s careers site →](https://intel.wd1.myworkdayjobs.com/External/job/US-California-Folsom/Senior-Formal-Verification-Engineer---AI-SoC-Development_JR0279196) ## More jobs at Intel ### [EDA Tools Hardware Engineer](https://jobs.opennash.com/companies/intel/jobs/e527a517cf3ca96573a7/) ### [Intel Foundry Advanced Device Development Engineering Manager](https://jobs.opennash.com/companies/intel/jobs/e840282bd3db6353999c/) ### [Model Support and Optimization Engineer](https://jobs.opennash.com/companies/intel/jobs/f8b9ca0e7f0c9835fcd0/) ### [Pre-si Power and Performance System Validation Engineer](https://jobs.opennash.com/companies/intel/jobs/2952b2d23364dc942a93/) ### [SAP MM/PP Business Systems Analyst](https://jobs.opennash.com/companies/intel/jobs/9e12f560ce050de57e93/) ## Similar jobs at other companies ### [Formal Verification CAD Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/31ec5eb21a89b05efb66/) Qualcomm · Bangalore, India ### [Principal Formal Design Verification Engineer](https://jobs.opennash.com/companies/microsoft/jobs/77157c255f58687bb52b/) Microsoft · India, Karnataka, Bangalore ### [Formal Verification Senior Engineer - Qualcomm, Cambridge, UK](https://jobs.opennash.com/companies/qualcomm/jobs/f03f4252eeff9b77c634/) Qualcomm · Cambridge, United Kingdom ### [Principal SOC Performance Verification Engineer](https://jobs.opennash.com/companies/microsoft/jobs/4978befbe1d83beb7e57/) Microsoft · India, Karnataka, Bangalore ### [Senior SoC Formal Verification Engineer, Google Cloud](https://jobs.opennash.com/companies/alphabet/jobs/174b5da9e2c3f0dc6599/) Alphabet · Tel Aviv, Israel +1 more [Operations jobs](/functions/operations/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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