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Infineon Technologies · Munich, BY, DE

# Bachelor/ Master Thesis - Implementation of a Latch-Based Register File for RISC-V Cores (f/m/div)

Munich, BY, DE Full-time 

Listed on Infineon Technologies’s official careers site. Posted October 29, 2026. Check that it is still open and apply there.
[Apply on Infineon Technologies’s careers site →](https://jobs.infineon.com/careers/job/563808971833193)

[OpenNash Jobs](https://jobs.opennash.com/) / [Infineon Technologies](https://jobs.opennash.com/companies/infineon-technologies/) / Bachelor/ Master Thesis - Implementation of a Latch-Based Register File for RISC-V Cores (f/m/div)

## Job description

### Build your technical foundation

Get familiar with Infineon's code generation framework, RISC-V processor architectures, and register-file implementations
- Develop latch-based register-file solutions: Investigate latch-based storage architectures and clocking schemes for processor register files, then develop and implement a configurable latch-based register-file solution
- Evaluate implementation options: Assess different implementation options with respect to timing, area, power, and robustness
- Analyze design-for-testability: Analyze DFT aspects and compare latch-based and flip-flop based approaches
- Integrate your work: Integrate the solution into the code-generation framework and generate implementations for various RISC-V cores
- Verify and validate: Perform functional verification, synthesis, and implementation studies
- Contribute to research: Contribution to a publication is desired Education: Bachelor's or master's student in Computer Science, Electrical Engineering, or similar Interests: Bring a background in design, synthesis, timing analysis, and simulation of digital circuits using (System-)

### Verilog or VHDL Knowledge

Have an understanding of digital design concepts such as latches, flip-flops, clock gating, and DFT Skills: Proficiency in Python, Linux, and Git; programming skills are a must Experience: Ideally, have experience with processor microarchitecture and RISC-V Availability: You are available for an upfront internship to get familiar with some of techniques before the thesis starts Language skills: Fluent English skills, both written and spoken; German is a plus We are on a journey to create the best Infineon for everyone.

We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process.

Learn more about our various contact channels and about Diversity & Inclusion at Infineon.

### Recruiter

Britta Johansson

## At a glance
- Posted by the employer: Oct 29, 2026
- First seen by OpenNash: Nov 3, 2026
- Last checked: Nov 3, 2026
- Listed for: 5 days
- Location: Munich, BY, DE
- Employment type: Full-time[Apply on Infineon Technologies’s careers site →](https://jobs.infineon.com/careers/job/563808971833193)

## Hiring at Infineon Technologies
- Open jobs: 1,667
- New in the last 7 days: After two weekly collections
- Tracked since: Oct 13, 2026

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