[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Cisco Systems jobs](https://jobs.opennash.com/companies/cisco-systems/) · [Search jobs](/search/) Cisco Systems · Belgrade, Serbia # Senior Design Verification Engineer Belgrade, Serbia Full-time Senior individual contributor Design Listed on Cisco Systems’s official careers site. Posted August 4, 2026. Check that it is still open and apply there. [Apply on Cisco Systems’s careers site →](https://careers.cisco.com/global/en/job/CISCISGLOBAL1445924EXTERNALENGLOBAL/Senior-Design-Verification-Engineer) [OpenNash Jobs](https://jobs.opennash.com/) / [Cisco Systems](https://jobs.opennash.com/companies/cisco-systems/) / Senior Design Verification Engineer ## Job description Meet the Team Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust. Your Impact Implementation of DV infrastructure for block, cluster, and TOP-level environments. Maintaining existing DV environments and enhancing them. Ensuring complete verification coverage through implementation and review of code and functional coverage. Working closely with architects and designers to ensure verification completeness. Supporting tests done with emulation. Engage in tasks to prepare for post-silicon-validation. ### Minimum Requirements 5+ years’ experience in digital logic design verification Advanced knowledge of SystemVerilog and UVM Advanced debug skills pre-silicon and in-lab Preferred Requirements: Scripting abilities System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU) Basic SW knowledge (chop driver level) Basic design knowledge Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. ## At a glance - Posted by the employer: Aug 4, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 18, 2026 - Listed for: 100 days - Location: Belgrade, Serbia - Employment type: Full-time[Apply on Cisco Systems’s careers site →](https://careers.cisco.com/global/en/job/CISCISGLOBAL1445924EXTERNALENGLOBAL/Senior-Design-Verification-Engineer) ## More jobs at Cisco Systems ### [C++ Software Engineer](https://jobs.opennash.com/companies/cisco-systems/jobs/c7b54444e8a1a9a6a549/) Belgrade, Serbia ### [C++ Software Engineer – SDK System & Performance](https://jobs.opennash.com/companies/cisco-systems/jobs/104e0ce4a47fa17bc26c/) Belgrade, Serbia ### [AI Infrastructure Engineer - GoLang, Kubernetes, Dockers, Linux - 8-12 years](https://jobs.opennash.com/companies/cisco-systems/jobs/d7b4e9feb0a817fbd8ff/) Bangalore, India ### [AI-Driven ASIC Physical Design Principal Engineer](https://jobs.opennash.com/companies/cisco-systems/jobs/a260f7ee14f00181b086/) San Jose, California, United States of America ### [ASIC Design Engineer Technical Lead](https://jobs.opennash.com/companies/cisco-systems/jobs/748126c6708cca314cf7/) San Jose, California, United States of America ## Similar jobs at other companies ### [Design Verification Engineer](https://jobs.opennash.com/companies/siemens/jobs/3469736e66b7ab53255d/) Siemens ### [NOC Design Verification Engineers (Engineer/Sr Engineer)](https://jobs.opennash.com/companies/qualcomm/jobs/012c5b47fdde2230c018/) Qualcomm · Bangalore, India ### [Design Verification Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/e0e64d6ed7ea9cff1d03/) Microsoft · India, Karnataka, Bangalore ### [BT - Design Verification Sr Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/8a4545cadb1eb8810d4d/) Qualcomm · Bangalore, India ### [Principal Formal Design Verification Engineer](https://jobs.opennash.com/companies/microsoft/jobs/77157c255f58687bb52b/) Microsoft · India, Karnataka, Bangalore OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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