[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Cisco Systems jobs](https://jobs.opennash.com/companies/cisco-systems/) · [Search jobs](/search/) Cisco Systems · Bangalore, India # IC Package design engineer- 4+ Years Bangalore, India Full-time Design Listed on Cisco Systems’s official careers site. Posted September 29, 2026. Check that it is still open and apply there. [Apply on Cisco Systems’s careers site →](https://careers.cisco.com/global/en/job/CISCISGLOBAL2005730EXTERNALENGLOBAL/IC-Package-design-engineer-4-Years) [OpenNash Jobs](https://jobs.opennash.com/) / [Cisco Systems](https://jobs.opennash.com/companies/cisco-systems/) / IC Package design engineer- 4+ Years ## Job description Meet the Team Join the Package Design Team at Cisco Silicon One in Armenia, a group leading the way in developing Cisco's groundbreaking silicon solutions for next-generation networking. As a collaborative team at the center of Cisco's silicon development, we design and optimize advanced package solutions for some of the industry’s most sophisticated ASICs. You’ll work directly with experts in layout, signal integrity, and power distribution, shaping innovative methodologies and driving the evolution of high-performance networking technologies. Your Impact This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Cisco Silicon One initiative. As a lead engineer, you will drive the entire package design process—from planning and optimization to execution—ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will mentor engineers, define strategies, and collaborate across multi-functional teams to accelerate the creation of industry-leading silicon packages. Beyond technical leadership, you’ll join a passionate community dedicated to changing how the world connects, works, and learns, while building strong partnerships and fostering collective success. ### Responsibilities - Lead package design tasks, planning and driving schedules from concept through implementation - Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance and manufacturability - Collaborate with silicon floor planning, signal integrity (SI), and power integrity (PI) teams to ensure design quality and efficiency - Work closely with layout editors to deliver high-quality package designs aligned with interface requirements Enhance design methodologies and partner with vendors to improve product quality and efficiency - Drive innovation in package solutions for Cisco’s next-generation ASICs ### Minimum Qualifications - Over 3 years of experience in package layout design. - Skilled in high-speed layout design, such as PCIe, DDR, and SerDes technologies. - Proficient in using the Cadence APD layout tool. ### Preferred Qualifications - Experience with multi-die package and interposer designs Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. ## At a glance - Posted by the employer: Sep 29, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 18, 2026 - Listed for: 100 days - Location: Bangalore, India - Employment type: Full-time[Apply on Cisco Systems’s careers site →](https://careers.cisco.com/global/en/job/CISCISGLOBAL2005730EXTERNALENGLOBAL/IC-Package-design-engineer-4-Years) ## More jobs at Cisco Systems ### [AI Infrastructure Engineer - GoLang, Kubernetes, Dockers, Linux - 8-12 years](https://jobs.opennash.com/companies/cisco-systems/jobs/d7b4e9feb0a817fbd8ff/) Bangalore, India ### [ASIC Design Verification Engineer - 5 years to 13Years - Bangalore](https://jobs.opennash.com/companies/cisco-systems/jobs/8af1aa221a16d7e81760/) Bangalore, India ### [ASIC Design Verification Engineer | UVM | Exp. 8+ years](https://jobs.opennash.com/companies/cisco-systems/jobs/d15031bf5a1d3c6fd123/) Bangalore, India ### [ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years](https://jobs.opennash.com/companies/cisco-systems/jobs/2c32b7f33352ae771e44/) Bangalore, India ### [ASIC Engineering Technical Leader (RTL Design/SOC | 8- 14 Years)](https://jobs.opennash.com/companies/cisco-systems/jobs/3b1a2f5015498860a296/) Bangalore, India ## Similar jobs at other companies ### [Senior Engineer - IC Package Design](https://jobs.opennash.com/companies/qualcomm/jobs/a7346b2a5891f56f32ed/) Qualcomm · Bangalore, India ### [NOC Design Verification Engineers (Engineer/Sr Engineer)](https://jobs.opennash.com/companies/qualcomm/jobs/012c5b47fdde2230c018/) Qualcomm · Bangalore, India ### [Associate Engineer, System Design Engineering ( FPGA Design 2-4 years)](https://jobs.opennash.com/companies/sandisk/jobs/9026a2ba75bb7de6187b/) Sandisk ### [Staff Engineer, System Design Engineering ( NAND FLASH) 8 - 14 years, Bangalore](https://jobs.opennash.com/companies/sandisk/jobs/fa4ef4b0a501325dde63/) Sandisk ### [Staff Engineer Simulation and Package Design Methodology (f/m/div)](https://jobs.opennash.com/companies/infineon-technologies/jobs/c531842c5bdd1461c64a/) Infineon Technologies · Villach OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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