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Celestica · Penang, MY

# Staff Engineer, Signal Test Leader

Penang, MY Remote Senior individual contributor Operations 

Listed on Celestica’s official careers site. Listed as of October 19, 2026. Check that it is still open and apply there.
[Apply on Celestica’s careers site →](https://careers.celestica.com/job/Penang-Staff-Engineer%2C-Signal-Test-Leader-07/1412658133/)

[OpenNash Jobs](https://jobs.opennash.com/) / [Celestica](https://jobs.opennash.com/companies/celestica/) / Staff Engineer, Signal Test Leader

## Job description

### Req ID

138120 Remote Position: No Region: Asia Country: Malaysia State/Province: Bayan Lepas City: Penang General Overview Job Title: Staff Engineer, Hardware Design Functional Area: Engineering (ENG)

### Career Stream

Design Engineering Hardware (DHW)

### Role

Staff Engineer (SEN)

### Job Code

SEN-ENG-DHW Job Band: 10 Direct/Indirect Indicator: Indirect Summary As a Project Signal Test Leader, you will play a pivotal dual role in our new domain-based specialization model. You will act as a Project Coordinator, planning and managing overall validation schedules, and as a Domain Champion (SME), providing deep technical leadership in key testing pillars (e.g., High-Speed, Low-Speed, Clock, Power

Integrity). This strategic role is critical for driving project execution, managing relationships with R&D and customers, and ensuring engineering rigor across our server, storage, and communication platforms. #LI-CT1 Detailed Description Performs tasks such as, but not limited to, the following: Validation Planning & Ownership: Develop and approve comprehensive Signal Integrity (SI) and Power Integrity (PI) test plans, defining scope, schedule estimations, and resource allocations.

### Unified Master Test Plan (MTP)

Aggregate technically approved test plan drafts from various engineering pillars into a single, unified Master Test Plan for each project.

### Project & Lab Management

Drive project milestones, manage lab bench scheduling, and dynamically adjust testing timelines based on problem occurrence and troubleshooting.

### R&D & Stakeholder Interface

Act as the primary technical interface for customers, Technical Project Leads (TPLs), and Hardware EE/R&D teams. Lead collaborative debugging, failure analysis (FA), and problem-solving sessions.

### Quality Assurance & Review

Perform the final "Project-Level Review" to ensure the complete data package meets rigorous quality standards, and technically approve the data before release.

### Technical Governance

As a Domain Champion, establish and maintain "Master Technical Templates" and Standard Operating Procedures (SOPs) to shorten testing times and broaden test coverage.

### Expert-Level Support & Mentorship

Serve as the Subject Matter Expert (SME) to resolve complex technical roadblocks, bugs, or equipment failures. Mentor and train junior engineers on advanced equipment usage and automation (Python/SCPI).

### Knowledge/Skills/Competencies Experience

Minimum 8–10 years in hardware board-level testing, with a clear progression of technical and leadership responsibilities.

### Architectural Expertise (Preferred)

In-depth understanding of PC, server, storage, and communication product architectures from an electrical, SI, and PI perspective.

### Technical Domain Depth

Practical mastery of signal integrity theory and validation of key buses: High-Speed: PCIe (Gen 5/6/7), CXL, DDR5, SAS/SATA, LAN, and ultra-high-speed interfaces (up to 224G).

### Power Integrity (PI)

Power noise, DC-DC testing, and rail characterization.

### Low-Speed/Sideband

I2C, SPI, USB, and SMBus.

### Clock

Noise Jitter measurement Instrumentation Mastery: Expert hands-on capability with high-end lab equipment (e.g., high-bandwidth oscilloscopes, Vector Network Analyzers [VNA], BERTs, TDR, and active probes).

### Leadership

Strong teamwork spirit with proven experience in managing workloads, scheduling, and customer communication. Physical Demands Duties of this position are performed in a normal office environment. Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required.

Occasional travel may be required. Typical Experience Minimum 8–10 years in hardware board-level testing, with a clear progression of technical and leadership responsibilities. Typical Education Degree in Electrical Engineering or equivalent. Notes This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.

Celestica is an equal opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status (including race, religion, national origin, gender, sexual orientation, age, marital status, veteran or disability status or other characteristics protected by law). At Celestica we are committed to fostering an inclusive, accessible environment, where all employees and customers feel valued, respected and supported.

Special arrangements can be made for candidates who need it throughout the hiring process. Please indicate your needs and we will work with you to meet them.

### COMPANY OVERVIEW

Celestica, Inc. (NYSE: CLS; TSX: CLS) is a technology leader dedicated to driving customer success and market advancements. With deep expertise in design, engineering, manufacturing, supply chain, and platform solutions, Celestica enables critical data center infrastructure for AI, cloud, and hybrid cloud and advances technologies in high-growth markets. With a talented team and a strategic global network, Celestica helps its customers achieve competitive advantages.

Today, Celestica delivers innovative supply chain solutions globally to customers in strategic two operating and reporting segments: Advanced Technology Solutions (ATS) and Connectivity and Cloud Solutions (CC): ATS: This segment serves customers in complex, regulated and high-reliability markets such as Industrial & Smart Energy, Aerospace & Defense, Semiconductor Capital Equipment, and HealthTech. It is engineering led, with deep expertise in design, manufacturing and lifecycle solutions.

### CCS

This segment focuses on high-performance technology solutions and services for the data center, serving hyperscalers, digital native customers and enterprises. Celestica's Platform Solutions offering provides innovative and customizable computing, storage and networking solutions enabling AI-driven growth. Built on a legacy of trust and performance, Celestica has earned its reputation by delivering results in complex and fast-changing markets.

Celestica exceeds customer expectations by identifying trends and staying ahead of the curve. Backed by comprehensive capabilities and a global network across North America, Europe and Asia, Celestica helps customers gain competitive advantage with the quality, flexibility and resiliency they need to respond quickly to shifts in demand. Guided by a bold vision to accelerate market advancements, Celestica delivers innovative solutions and technologies that turn complexity into opportunity.

Anchored in teamwork and commitment, Celestica strives to be the most trusted partner to its customers and colleagues worldwide. Celestica would like to thank all applicants, however, only qualified applicants will be contacted. Celestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services.

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 19, 2026
- Listed for: 7 days
- Location: Penang, MY
- Work arrangement: Remote[Apply on Celestica’s careers site →](https://careers.celestica.com/job/Penang-Staff-Engineer%2C-Signal-Test-Leader-07/1412658133/)

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