[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Cadence Design jobs](https://jobs.opennash.com/companies/cadence-design/) · [Search jobs](/search/) Cadence Design # Internship Position (Digital Signoff Group) Early career Listed on Cadence Design’s official careers site. Posted September 18, 2026. Check that it is still open and apply there. [Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/CORK-01/Internship-Position--Digital-Signoff-Group-_R55751) [OpenNash Jobs](https://jobs.opennash.com/) / [Cadence Design](https://jobs.opennash.com/companies/cadence-design/) / Internship Position (Digital Signoff Group) ## Job description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. About Cadence Cadence is a global technology company (CDNS) and a key player in the design and production of semiconductor chips worldwide. From 5G mobile phones to Mars rovers and satellites, our products are used by the world’s leading technology companies to design world-class electronic systems. As semiconductor technology continues to evolve, our software must continuously advance to meet the ever-changing needs of our customers. Cadence Ireland is entering an exciting phase of growth with the creation of a new R&D Centre of Excellence. Our goal is to make a significant contribution to advancing the state of the art and delivering the next generation of Electronic Design Automation (EDA) solutions to major semiconductor companies worldwide. About the Role We are seeking a highly motivated Product Engineering (PE) Intern to join the Pegasus physical verification team. Pegasus is Cadence’s next-generation physical verification platform used by semiconductor foundries and chip design companies to perform critical signoff verification tasks, including Design Rule Checking (DRC), Layout Versus Schematic (LVS), Fill, Pattern Matching, and advanced manufacturing verification. As a Product Engineering Intern, you will work closely with Product Engineers, R&D teams, and leading semiconductor customers to help develop, validate, and deploy cutting-edge verification solutions. This role provides hands-on exposure to advanced semiconductor manufacturing technologies and industry-leading EDA software. ### Responsibilities Assist in testing and validating Pegasus physical verification flows and new product features. Develop and execute verification test cases to ensure product quality and robustness. Analyse verification results, investigate issues, and help reproduce customer-reported problems. Work with Product Engineering and R&D teams to debug and resolve technical issues. Support the qualification of new semiconductor process technologies and design rules. Create automation scripts and tools to improve engineering productivity and test coverage. Prepare technical documentation, reports, and presentations summarising findings and recommendations. Collaborate with global teams across Europe, Asia, and North America on customer and technology initiatives. ### Qualifications Currently pursuing a Bachelor’s, Master’s, or PhD degree in Electronic Engineering, Computer Engineering, Computer Science, or a related discipline. Strong analytical and problem-solving skills. Basic Programming or scripting experience (Python, Shell, Perl, or similar) is desirable. Knowledge of semiconductor design, IC layout, or EDA tools. Familiarity with Linux/Unix environments is an advantage. Excellent communication and teamwork skills. Strong attention to detail and willingness to learn new technologies. What You Will Gain Exposure to state-of-the-art semiconductor design and verification technologies. Experience working on real-world projects used by leading semiconductor companies. Mentorship from experienced Product Engineering and R&D professionals. Opportunities to contribute to innovative solutions in advanced process nodes and next-generation chip design. Experience in a collaborative, multicultural engineering environment with global impact. We’re doing work that matters. Help us solve what others can’t. ## At a glance - Posted by the employer: Sep 18, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 30 days[Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/CORK-01/Internship-Position--Digital-Signoff-Group-_R55751) ## More jobs at Cadence Design ### [INTERN](https://jobs.opennash.com/companies/cadence-design/jobs/31f7d96f190c41d32545/) ### [Intern SSG](https://jobs.opennash.com/companies/cadence-design/jobs/963eabf94ebef4efb3cf/) ### [AI Intern - Technical Communications (System Design Analysis Group)](https://jobs.opennash.com/companies/cadence-design/jobs/3fd4e202987c9263bc42/) ### [Design Engineering Architect](https://jobs.opennash.com/companies/cadence-design/jobs/c42d0049f16c381b7e3e/) ### [Lead Analog Layout Design Engineer](https://jobs.opennash.com/companies/cadence-design/jobs/62d685886881e996bd7d/) ## Similar jobs at other companies ### [Product Risk Manager | Digital (Position 4)](https://jobs.opennash.com/companies/grasim-industries/jobs/426f2ff40208e193e632/) Grasim Industries · Maharashtra ### [Internship - Digital Security](https://jobs.opennash.com/companies/airbus/jobs/20611cb93e0169ddd5e3/) AIRBUS · Bangalore Area ### [Internship - Digital Marketing & Marcom](https://jobs.opennash.com/companies/infineon-technologies/jobs/065bfbdb9d79eb6430c2/) Infineon Technologies · Singapore ### [NPU EMIR (PDN) Signoff Engineer, Senior](https://jobs.opennash.com/companies/qualcomm/jobs/5624e527a5fdf3b2c7dc/) Qualcomm · Bangalore, India OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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