[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Cadence Design jobs](https://jobs.opennash.com/companies/cadence-design/) · [Search jobs](/search/) Cadence Design · San Jose # RTL2GDS, Product Engineering Architect San Jose $178,500 to $331,500 Operations Listed on Cadence Design’s official careers site. Posted September 27, 2026. Check that it is still open and apply there. [Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/SAN-JOSE/Sr-Principal-Product-Engineer_R54516) [OpenNash Jobs](https://jobs.opennash.com/) / [Cadence Design](https://jobs.opennash.com/companies/cadence-design/) / RTL2GDS, Product Engineering Architect ## Job description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This position presents an exciting opportunity within Cadence’s Digital and Signoff Group (DSG) for a Product Engineer. In this dynamic environment, you’ll collaborate closely with R&D, Application Engineering & product marketing teams to help drive the development of advanced chip design software tools. As a Product Engineer, you will serve as a key technical resource, providing place-and-route expertise to both Cadence customers and internal development teams. Candidates should bring a strong motivation and energy, along with a thorough understanding of ASIC design methodologies across all stages of the RTL to GDSII flow. Hands-on experience with timing closure and PPA optimization at 7nm and below is essential. Your analytical strengths will be vital in diagnosing customer challenges and delivering well-organized solutions. Excellent communication skills are required to ensure clear and effective collaboration. Responsibilities for this role include supporting Cadence’s digital products, tracking and resolving customer issues alongside R&D and release teams, and conducting design benchmarks. You will also develop innovative flows and methodologies tailored to customer needs. To qualify, applicants must possess a BS in Electrical Engineering with at least seven years of experience in digital implementation as either a design or product engineer Candidates should demonstrate a solid understanding of VLSI physical design and timing analysis, including familiarity with clock tree synthesis, routing optimization, and silicon signoff challenges Experience with industry-standard EDA tools for synthesis, physical design, and signoff at 7nm and below nodes is required - Proficiency in scripting languages or AI tools for productivity enhancement will be considered an asset - Strong verbal and written communication skills The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t. ## At a glance - Posted by the employer: Sep 27, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 18, 2026 - Listed for: 100 days - Location: San Jose - Pay: $178,500 to $331,500[Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/SAN-JOSE/Sr-Principal-Product-Engineer_R54516) ## More jobs at Cadence Design ### [ATE Test Engineering Architect](https://jobs.opennash.com/companies/cadence-design/jobs/9e10fb091249050ec22d/) San Jose ### [Applied ML – Functional Verification Engineer](https://jobs.opennash.com/companies/cadence-design/jobs/fe0a7f82610053d8d221/) San Jose ### [CST Application Engineer - Systems/ATX](https://jobs.opennash.com/companies/cadence-design/jobs/d37fcf59ed841608a74e/) San Jose ### [CST Application Engineer Intern - Physical Systems](https://jobs.opennash.com/companies/cadence-design/jobs/03fe481b63792e905870/) San Jose ## Similar jobs at other companies ### [Manufacturing Engineer - Industrialization - GDS M/F](https://jobs.opennash.com/companies/safran/jobs/821fec44b2e9808c7a28/) Safran ### [AI Solution Architect and Product Owner – Cost Value Engineering](https://jobs.opennash.com/companies/siemens-energy/jobs/8113b9deca47eb65a851/) Siemens Energy ### [Solution Architect - Product Engineer](https://jobs.opennash.com/companies/siemens/jobs/8e36cfb889276bbc5fba/) Siemens ### [Embedded Product Security Architect](https://jobs.opennash.com/companies/sandisk/jobs/79a4590b42da55f79af9/) Sandisk ### [Product Security Assurance Architect](https://jobs.opennash.com/companies/sandisk/jobs/f8744be8857b8ba61317/) Sandisk OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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