[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Cadence Design jobs](https://jobs.opennash.com/companies/cadence-design/) · [Search jobs](/search/) Cadence Design · San Jose # Lead Software Engineer: AI for Hardware Verification San Jose Manager or lead $119,000 to $221,000 Software Engineering Listed on Cadence Design’s official careers site. Posted September 29, 2026. Check that it is still open and apply there. [Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/SAN-JOSE/Lead-Software-Engineer--AI-for-Hardware-Verification_R56507) [OpenNash Jobs](https://jobs.opennash.com/) / [Cadence Design](https://jobs.opennash.com/companies/cadence-design/) / Lead Software Engineer: AI for Hardware Verification ## Job description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems Inc. is looking for a motivated Lead Software Engineer to work with us in San Jose, California. At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and is also a Fortune 100 Best Companies to Work For. As a Lead Software Engineer, you will be part of the HSV Software team in the SVG group in San Jose, California. The HSV Software team builds AI-enabled software products that support emulation and prototyping platforms, helping customers accelerate design bring-up, debug, verification, and validation workflows. To understand more on what we do, you can visit [https://www.cadence.com/en_US/home/tools/system-design-and-verification.html](https://www.cadence.com/en_US/home/tools/system-design-and-verification.html). Working at Cadence is very dynamic, fast-paced, and integrated with other teams all around the world. ### Job Description Design and develop AI-enabled software components for emulation and prototyping workflows, balancing reliability, maintainability, security, latency, cost, and integration with existing product architecture. Build LLM-based agents, RAG workflows, and automation services that improve design bring-up, verification, debug, and validation while recommending product enhancements beyond defect fixes. Apply secure and responsible AI practices, including data protection, access control, prompt-injection awareness, safe tool use, auditability, and careful handling of sensitive design data. Create and execute testing, evaluation, and observability workflows for assigned AI product areas, covering regression tests, retrieval quality, model-output review, tracing, and failure analysis. Serve as a technical resource for peers and less-experienced engineers, collaborating with internal partners, senior individual contributors, and managers to deliver high-quality AI-enabled software. ### Requirements Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience; typically 4+ years with a Bachelor’s, 2+ years with a Master’s, or PhD-level preparation in related software development. Strong Python skills and software engineering fundamentals, including APIs, testing, debugging, maintainability, Unix/Linux environments, and distributed development workflows. Hands-on experience building AI-enabled applications, agentic workflows, or automation services using LLM APIs, open-source models, enterprise AI platforms, and orchestration tools such as LangGraph, LangChain, AutoGen, CrewAI, or similar frameworks. Understanding of modern RAG and agentic AI patterns, including retrieval, chunking, embeddings, vector or hybrid search, reranking, tool calling, workflow orchestration, human-in-the-loop review, and traceability. Ability to evaluate, secure, and debug AI product behavior using golden datasets, regression tests, hallucination checks, prompt and retrieval analysis, observability traces, quality metrics, and responsible AI practices. ### Nice to have Experience developing software using version control systems and modern CI/CD practices. Experience with other programming languages such as C++, Tcl, or JavaScript/TypeScript. Knowledge or experience with design verification, emulation, prototyping, or hardware-assisted debug workflows. Knowledge or experience with EDA and VLSI design, including Verilog, SystemVerilog, or VHDL. Exposure to practical AI application security, such as prompt-injection awareness, safe tool integration, access control, input/output validation, or secure handling of design data. ### Additional Job Details Employment category: Full-time. ### Employment term 40 hours/week. Competitive benefits. ### Location San Jose, California. ### About Cadence Design Systems Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access [http://www.cadence.com](http://www.cadence.com). We’re doing work that matters. Help us solve what others can’t. The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t. ## At a glance - Posted by the employer: Sep 29, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 19 days - Location: San Jose - Pay: $119,000 to $221,000[Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/SAN-JOSE/Lead-Software-Engineer--AI-for-Hardware-Verification_R56507) ## More jobs at Cadence Design ### [Director of Software Security](https://jobs.opennash.com/companies/cadence-design/jobs/74f03abd539056d18b6b/) San Jose ### [Full-Stack Software Engineer - IDE, Web APIs, Infrastructure](https://jobs.opennash.com/companies/cadence-design/jobs/e6da2371a5b2257fd29b/) San Jose ### [Lead Software Engineer](https://jobs.opennash.com/companies/cadence-design/jobs/db1c8875d63e33953453/) San Jose ## Similar jobs at other companies ### [Hardware Verification Engineer - Cork, Ireland](https://jobs.opennash.com/companies/qualcomm/jobs/4d0273c68af8f2583ee1/) Qualcomm · Cork, Ireland ### [Senior Hardware Verification Engineer - Cork, Ireland](https://jobs.opennash.com/companies/qualcomm/jobs/889a438a5bf41648a514/) Qualcomm · Cork, Ireland ### [Hardware Verification Engineer 2 - Azure Core](https://jobs.opennash.com/companies/microsoft/jobs/a8bbedaa8912c39a995c/) Microsoft · Serbia, Belgrade ### [Hardware Verification Engineer - Microsoft Azure](https://jobs.opennash.com/companies/microsoft/jobs/25e3c3dc82da2f26fdee/) Microsoft · Israel, Multiple Locations ### [Staff Engineer Embedded Software Verification (f/m/div)](https://jobs.opennash.com/companies/infineon-technologies/jobs/3aba5f389fa881b98832/) Infineon Technologies · Langen OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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