[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Cadence Design jobs](https://jobs.opennash.com/companies/cadence-design/) · [Search jobs](/search/) Cadence Design · Bangalore # Lead Design Engineer Bangalore Manager or lead Design Listed on Cadence Design’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/BANGALORE/Lead-Design-Engineer_R56130-2) [OpenNash Jobs](https://jobs.opennash.com/) / [Cadence Design](https://jobs.opennash.com/companies/cadence-design/) / Lead Design Engineer ## Job description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Analog Mixed-Signal Lead Design Engineer (T3) – SerDes ### Position Summary We are seeking an Analog Mixed-Signal Lead Design Engineer (T3) to develop high-speed, low-power SerDes transceivers for data-center, networking, AI, and high-performance computing applications. The engineer will translate system requirements into silicon-ready circuit architectures and collaborate with the architecture, digital, layout, verification, signal integrity, and post-silicon teams. ### Key Responsibilities Design and verify high-speed SerDes blocks, including TX drivers, serializers, RX front ends, CTLEs, samplers, comparators, ADCs, DACs, PLLs, DLLs, clock dividers and distribution networks, regulators, bias circuits, and calibration loops. Translate link-level requirements into circuit specifications and optimize performance across PVT, mismatch, aging, and extracted parasitics. Develop behavioral models and support mixed-signal and top-level verification. Collaborate with layout and signal-integrity teams on physical implementation, channel/package effects, and post-layout signoff. Support tapeout, silicon bring-up, characterization, debug, and production release. Document results and participate in technical design reviews. ### Required Qualifications B.S. in Electrical Engineering or a related field with 3+ years of relevant experience, or an M.S. with 1+ years. Strong analog CMOS, noise, jitter, feedback, signal-integrity, and data-converter fundamentals. Hands-on transistor-level design experience with high-speed SerDes circuits. Excellent command of Cadence Virtuoso, Spectre, Spectre RF, ADE, parasitic extraction, and mixed-signal verification flows. Strong analytical, communication, collaboration, and engineering judgment. ### Preferred Qualifications Experience with PAM4/NRZ SerDes, advanced CMOS or FinFET technologies, and standards such as Ethernet, PCIe, or CXL. MATLAB or C for architecture development; SystemVerilog or Verilog-A for functional modeling; and Perl or Python for automation. Experience using AI-assisted engineering tools responsibly for design exploration, verification, debugging, documentation, and workflow automation. Custom analog layout experience is a plus. Lab characterization experience is a plus, along with experience taking mixed-signal IP from architecture through tapeout and silicon validation. Success in This Role The ideal candidate combines strong circuit intuition, disciplined verification, ownership, and clear communication to deliver reliable, power-efficient SerDes solutions. We’re doing work that matters. Help us solve what others can’t. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 7 days - Location: Bangalore[Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/BANGALORE/Lead-Design-Engineer_R56130-2) ## More jobs at Cadence Design ### [Design Architect](https://jobs.opennash.com/companies/cadence-design/jobs/f3a8337bf1d249c3a4b4/) Bangalore ### [Design Engineer II](https://jobs.opennash.com/companies/cadence-design/jobs/56577b1db28ddf18d740/) Bangalore ## Similar jobs at other companies ### [Senior Staff Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/9c9c9ee8de475c168163/) Sandisk ### [Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/04c89e21c7a143aa3d7b/) Sandisk ### [Staff / Senior Staff Engineer Digital Design (RTL Design)](https://jobs.opennash.com/companies/infineon-technologies/jobs/bcdb3b7a61b92eede1d2/) Infineon Technologies · Singapore ### [Electrical Design Engineer - Substation Bengaluru, Karnataka Bengaluru, Karnataka ENGINEERING / DESIGN STUDIES / METHODS ENGINEERING / DESIGN STUDIES / METHODS Permanent](https://jobs.opennash.com/companies/vinci/jobs/226b30542f183b716535/) VINCI · Bengaluru, Karnataka ### [Senior Design Engineer - UGC Scotland Gate, England Scotland Gate, England ENGINEERING / DESIGN STUDIES / METHODS ENGINEERING / DESIGN STUDIES / METHODS](https://jobs.opennash.com/companies/vinci/jobs/e05c4ba864beb3623d58/) VINCI · Scotland Gate, England [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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