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Cadence Design · San Jose

# Lead Analog IC Design Engineer

San Jose Manager or lead $119,000 to $221,000 Design 

Listed on Cadence Design’s official careers site. Posted October 1, 2026. Check that it is still open and apply there.
[Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/SAN-JOSE/Lead-Analog-IC-Design-Engineer_R56535)

[OpenNash Jobs](https://jobs.opennash.com/) / [Cadence Design](https://jobs.opennash.com/companies/cadence-design/) / Lead Analog IC Design Engineer

## Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

### Role Overview

The Lead Analog IC Design Engineer is responsible for designing and developing analog and mixed-signal circuits- from initial concept and specification through final verification- to ensure conformance with customer requirements.

### Required Qualifications
- At least three years of experience designing and developing CMOS SerDes or high-speed I/O integrated circuits.
- Design experience with most of the following SerDes circuit blocks: Transmitters and receivers, serializers and deserializers, phase interpolators, low-jitter PLLs, high-speed clock-distribution circuits, bias circuits, and voltage regulators.
- Good understanding of jitter and signal-equalization techniques.
- Proficiency with CAD tools for circuit simulation, layout, and physical verification.
- Master’s degree or Ph.D. in electrical engineering.
- Strong problem-solving skills and analog design aptitude.
- Clear written and verbal communication skills.
- Ability to collaborate effectively in a team environment.

### Preferred Qualifications
- Working knowledge of common SerDes standards and their electrical requirements.
- Experience with Cadence design tools and laboratory testing.
- Design experience at data rates above 10 Gbps and in process technologies below 28 nm. The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits.

Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.

Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t.

## At a glance
- Posted by the employer: Oct 1, 2026
- First seen by OpenNash: Oct 11, 2026
- Last checked: Oct 18, 2026
- Listed for: 17 days
- Location: San Jose
- Pay: $119,000 to $221,000[Apply on Cadence Design’s careers site →](https://cadence.wd1.myworkdayjobs.com/External_Careers/job/SAN-JOSE/Lead-Analog-IC-Design-Engineer_R56535)

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