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Broadcom

# Principal Engineer

China-Shanghai-Zhangjiang Hi Tech Full-time Senior individual contributor Operations 

Listed on Broadcom’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there.
[Apply on Broadcom’s careers site →](https://broadcom.wd1.myworkdayjobs.com/External_Career/job/China-Shanghai-Zhangjiang-Hi-Tech/Principal-Engineer_R026289)

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## Job description

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### Job Description

Broadcom Limited offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing Broadcom’s leading-edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support.

Candidates will have opportunity to work on the latest 5nm/3nm designs Detail design tasks include Full Chip Synthesis and STA: An ideal candidate should have some background on full chip synthesis flow (DC, DCT, DCG) for 5nm/3nm design tape out. It would be better if the candidate have the experience running full chip STA and constraint clean up flow.

### Physical Design Implementation

An ideal candidate having some background in either the Physical Design which includes floor planning, placement, design closure, and DRC & LVS skills. Overall, candidates are expected to develop the most of above skills. Candidates who have the desire to seek the in-depth and broad technical challenge should apply. Requirements/Qualifications
- Candidates should have good understanding about ASIC design flow and solid VLSI background.
- Candidates should be able to handle block implementation/top level task independently.
- Tapeout experience in 5nm and blow process design.
- Candidate s should have strong communications and problem solving skills.
- Candidates with experience in any one of following knowledge are a plus - DFT insertion
- Power/IVD analysis - DRC/LVS - Top Floorplan/STA & Low Power

### Candidate is good at Perl/Tcl/Python Education/Certifications Preferred Degree
- MS Preferred Major: Microelectronics or related discipline Broadcom is proud to be an equal opportunity employer.

We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Jul 10, 2026
- Last checked: Oct 18, 2026
- Listed for: 100 days
- Location: China-Shanghai-Zhangjiang Hi Tech
- Employment type: Full-time[Apply on Broadcom’s careers site →](https://broadcom.wd1.myworkdayjobs.com/External_Career/job/China-Shanghai-Zhangjiang-Hi-Tech/Principal-Engineer_R026289)

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### [DFT Engineer](https://jobs.opennash.com/companies/broadcom/jobs/890aeb8e3884aa835d6b/)

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### [R&D Physical Design Engineer](https://jobs.opennash.com/companies/broadcom/jobs/77e03253d42f920a34c8/)

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### [ASIC DFT Engineer](https://jobs.opennash.com/companies/broadcom/jobs/54a424990afbee6f8775/)

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