[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Broadcom · Fort Collins, Colorado, USA # ASIC Design Engineer Fort Collins, Colorado, USA Full-time USD 61,900.00 To USD 99,000.00 Design Listed on Broadcom’s official careers site. Posted October 30, 2026. Check that it is still open and apply there. [Apply on Broadcom’s careers site →](https://broadcom.wd1.myworkdayjobs.com/External_Career/job/USA-Colorado-Fort-Collins-4380-Ziegler-Road/ASIC-Design-Engineer_R027509) [OpenNash Jobs](https://jobs.opennash.com/) / [Broadcom](https://jobs.opennash.com/companies/broadcom/) / ASIC Design Engineer ## Job description ### Please Note 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. ### Job Description Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular, Networking, Computing, and Storage products. This Design Engineering position focuses on the physical implementation of high-performance ASICs, providing hands-on experience with the latest 3 nm and smaller process nodes operating at speeds exceeding 1 GHz, from concept through production. The role offers exposure to advanced design methodologies and close collaboration with senior engineers across multiple disciplines to deliver industry-leading silicon solutions. ### Key Responsibilities Contribute to the physical design implementation of large-scale ASICs (multi-hundred-million gate complexity). Support key design activities including floorplanning, placement, clock tree synthesis, routing, timing closure, and physical verification (DRC/LVS). Collaborate with cross-functional teams on block-level integration, timing analysis, and design signoff. Utilize both commercial and in-house EDA tools for design, implementation, and verification. Contribute to design flow improvements, automation, and deep sub-micron methodology development. Assist in timing analysis, power planning, IR/EM checks, and post-route optimization. Gain exposure to the complete ASIC design cycle — from RTL to GDSII and silicon bring-up. Interface with customers and internal stakeholders to support technical discussions and design reviews. Technical Skills / Background Solid understanding of VLSI design, CMOS logic, and digital circuit fundamentals. Familiarity with ASIC physical design concepts such as placement, routing, and timing. Strong analytical and debugging skills, with the ability to quickly learn new tools and flows. Coding and Tool Proficiency Proficiency in UNIX/Linux environments. Working knowledge of TCL; familiarity with Python or Perl preferred. Exposure to EDA tools such as Cadence Innovus, Synopsys ICC2, or PrimeTime is a plus. Soft Skills Excellent communication, collaboration, and problem-solving abilities. Ability to work effectively with cross-functional and global teams. Highly motivated, detail-oriented, and eager to learn in a fast-paced R&D environment. Demonstrates strong engineering judgment, ownership, and accountability. ### Education and Experience Bachelor’s degree in Electrical or Computer Engineering, or Master’s degree in Electrical or Computer Engineering. Compensation and Benefits The annual base salary range for this position is USD 61,900.00 To USD 99,000.00 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements. ### Broadcom offers a competitive and comprehensive benefits package Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence. ## At a glance - Posted by the employer: Oct 30, 2026 - First seen by OpenNash: Nov 1, 2026 - Last checked: Nov 1, 2026 - Listed for: 2 days - Location: Fort Collins, Colorado, USA - Employment type: Full-time - Pay: USD 61,900.00 To USD 99,000.00[Apply on Broadcom’s careers site →](https://broadcom.wd1.myworkdayjobs.com/External_Career/job/USA-Colorado-Fort-Collins-4380-Ziegler-Road/ASIC-Design-Engineer_R027509) ## Hiring at Broadcom - Open jobs: 372 - New in the last 7 days: After two weekly collections - Tracked since: Jul 10, 2026 [All Broadcom jobs](https://jobs.opennash.com/companies/broadcom/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Broadcom ### [ASIC Design - Floorplan Engineer](https://jobs.opennash.com/companies/broadcom/jobs/2e40c1fcb20841e0c44b/) Fort Collins, Colorado, USA ### [ASIC Design Automation Engineer](https://jobs.opennash.com/companies/broadcom/jobs/d9b07fa434b98cde31bd/) Fort Collins, Colorado, USA ### [ASIC Package Design Project Manager](https://jobs.opennash.com/companies/broadcom/jobs/49f63f72d5185439e215/) Fort Collins, Colorado, USA ### [Design Engineer](https://jobs.opennash.com/companies/broadcom/jobs/afcc507d8dbb636e8272/) Fort Collins, Colorado, USA ## Similar jobs at other companies ### [ASIC & FPGA Design Engineer](https://jobs.opennash.com/companies/lockheed-martin/jobs/e94b640c48ecc099615e/) Lockheed Martin · Liverpool, NY ### [ASIC & FPGA Design Engineer - E2](https://jobs.opennash.com/companies/lockheed-martin/jobs/4510ab87f7a931bd10e6/) Lockheed Martin · Liverpool, NY ### [Principal ASIC Design Engineer](https://jobs.opennash.com/companies/fortinet/jobs/9286f067ac1219e2ec7e/) Fortinet · Sunnyvale, CA, United States ### [Digital ASIC Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/208c975103db0801757a/) Qualcomm · San Diego, California, United States of America ### [Processor ASIC RTL Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/53e4da287874608df756/) Qualcomm · San Diego, California, United States of America OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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