[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Broadcom jobs](https://jobs.opennash.com/companies/broadcom/) · [Search jobs](/search/) Broadcom · Multiple locations # R&D Engineer IC Design 5 Multiple locations Full-time USD 143,800.00 To USD 230,000.00 Design Listed on Broadcom’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Broadcom’s careers site →](https://broadcom.wd1.myworkdayjobs.com/External_Career/job/USA-California-San-Jose-1320-Ridder-Park-Drive/R-D-Engineer-IC-Design-5_R026760) [OpenNash Jobs](https://jobs.opennash.com/) / [Broadcom](https://jobs.opennash.com/companies/broadcom/) / R&D Engineer IC Design 5 ## Job description ### Please Note 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. ### Job Description This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs. The role involves hands-on implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing multiple successful ASIC design and verification cycles—from architecting testbenches (networking background preferred) to achieving full verification closure. ### Education & Experience Experience: 8+ years of ASIC design/verification experience, including a complete understanding of Verilog design and hands-on experience with C/C++. ### Education Bachelor's in Engineering Methodologies & Languages: Strong working knowledge of object-oriented programming (OOP) and modern ASIC verification flows (e.g., UVM/SystemVerilog). ### Technical Depth Complete mastery of Verilog for simulation and familiarity with ASIC design flows for deep sub-micron technologies. ### Domain Knowledge Experience with networking protocols (e.g., Ethernet, PCIe, routing/switching) is a major plus. ### Track Record Must have completed multiple ASIC tape-outs, with at least one project taken from initial concept through full production. ### Communication Fully comfortable with technical and business English across documentation, cross-functional collaboration, and executive communications. Compensation and Benefits The annual base salary range for this position is USD 143,800.00 To USD 230,000.00 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements. ### Broadcom offers a competitive and comprehensive benefits package Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Aug 20, 2026 - Last checked: Oct 18, 2026 - Listed for: 59 days - Location: Multiple locations - Employment type: Full-time - Pay: USD 143,800.00 To USD 230,000.00[Apply on Broadcom’s careers site →](https://broadcom.wd1.myworkdayjobs.com/External_Career/job/USA-California-San-Jose-1320-Ridder-Park-Drive/R-D-Engineer-IC-Design-5_R026760) ## More jobs at Broadcom ### [ASIC Design Engineer](https://jobs.opennash.com/companies/broadcom/jobs/58c7df4b829d96ac81e7/) ### [Analog and Mixed Signal Design Engineer](https://jobs.opennash.com/companies/broadcom/jobs/2e8eba68a43b90a63be9/) ### [Analog/Mixed Signal Verilog Modeling Design Engineer](https://jobs.opennash.com/companies/broadcom/jobs/93d18ab8e4ee9274eedd/) ### [Digital Design RTL Engineer](https://jobs.opennash.com/companies/broadcom/jobs/36a4ea0ac93533e43cc2/) ## Similar jobs at other companies ### [Senior Staff Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/9c9c9ee8de475c168163/) Sandisk ### [Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/04c89e21c7a143aa3d7b/) Sandisk ### [Staff / Senior Staff Engineer Digital Design (RTL Design)](https://jobs.opennash.com/companies/infineon-technologies/jobs/bcdb3b7a61b92eede1d2/) Infineon Technologies · Singapore ### [Electrical Design Engineer - Substation Bengaluru, Karnataka Bengaluru, Karnataka ENGINEERING / DESIGN STUDIES / METHODS ENGINEERING / DESIGN STUDIES / METHODS Permanent](https://jobs.opennash.com/companies/vinci/jobs/226b30542f183b716535/) VINCI · Bengaluru, Karnataka ### [Senior Design Engineer - UGC Scotland Gate, England Scotland Gate, England ENGINEERING / DESIGN STUDIES / METHODS ENGINEERING / DESIGN STUDIES / METHODS](https://jobs.opennash.com/companies/vinci/jobs/e05c4ba864beb3623d58/) VINCI · Scotland Gate, England [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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